Title:
SOLID ELECTROLYTIC CAPACITOR AND METHOD FOR MANUFACTURING SOLID ELECTROLYTIC CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2024/024802
Kind Code:
A1
Abstract:
This solid electrolytic capacitor (10) comprises a plurality of capacitor elements (20) and a plurality of negative electrode films (30). The plurality of capacitor elements (20) each comprise a positive electrode (21), a dielectric layer (210), and an inner layer CP (22) and an outer layer CP (23). The negative electrode films 30 each include an insulating base material (31) and a plurality of conductive fillers (32). The plurality of capacitor elements (20) and the plurality of negative electrode films (30) are alternately stacked in a state in which the outer layer CP (23) and the negative electrode films (30) are in contact with each other. A region, in which the outer layer CP (23) and the negative electrode films (30) are in contact with each other, has a portion in which a solid electrolytic layer and the negative electrode are both present.
Inventors:
MANO KYOTARO (JP)
Application Number:
PCT/JP2023/027262
Publication Date:
February 01, 2024
Filing Date:
July 25, 2023
Export Citation:
Assignee:
MURATA MANUFACTURING CO (JP)
International Classes:
H01G9/042; H01G9/00; H01G9/055
Domestic Patent References:
| WO2021066090A1 | 2021-04-08 |
Foreign References:
| JP2020155695A | 2020-09-24 |
Attorney, Agent or Firm:
KAEDE PATENT ATTORNEYS' OFFICE (JP)
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