SOLID ELECTROLYTIC CAPACITOR

WIPO Patent Application WO/2021/261351

A1

A solid electrolytic capacitor 1 comprises, in a thickness direction T: a valve action metal substrate 3a having a porous section 3b on the surface thereof; a dielectric layer 5 provided on the surface of the porous section 3b; a solid electrolyte layer 7a provided on the surface of the dielectric layer 5; a conductive layer 7b provided on the surface of the solid electrolyte layer 7a; and a cathode lead-out layer 7c provided on the surface of the conductive layer 7b. When viewed from the thickness direction T, the solid electrolyte layer 7a comprises a central region AR1 which includes the center of the solid electrolyte layer 7a, and an outer periphery region AR2 which is positioned on the periphery of the central region AR1 and which includes the entirety of the outer edge of the solid electrolyte layer 7a. Where the height in the thickness direction T is defined with respect to a reference surface S that includes a highest point P of the porous portion 3b in the thickness direction T and that is orthogonal to the thickness direction T: the outer periphery region AR2 is higher than the central region AR1 over the entire periphery of the central region AR1; and the conductive layer 7b is provided above at least the central region AR1 on the solid electrolyte layer 7a.

MANO KYOTARO (JP)
FUKUDA YASUTAKE (JP)

PCT/JP2021/022848

December 30, 2021

June 16, 2021

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MURATA MANUFACTURING CO (JP)

H01G9/028; H01G9/048; H01G9/15

JPH04276613A	1992-10-01
JP2010192831A	2010-09-02
JPH05101989A	1993-04-23

YASUTOMI & ASSOCIATES (JP)

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