Title:
SOLID-STATE IMAGE CAPTURING DEVICE AND IMAGE CAPTURING SYSTEM
Document Type and Number:
WIPO Patent Application WO/2019/107085
Kind Code:
A1
Abstract:
This solid-state image capturing device (1000) is provided with: a first conversion unit for converting an analog signal representing a pixel value into a high order bit of a digital signal; and a second conversion unit for converting the analog signal into a low order bit of the digital signal, wherein the second conversion unit is provided with: a first latch circuit for latching as phase information, a plurality of clock signals having a phase difference, the latching coinciding with the timing of the conversion to the high order bit in the first conversion unit; a conversion circuit for generating the low order bit of the digital signal by converting the phase information into a binary value; a summation unit (330); and a second latch circuit (340) for latching the summation results of the summation unit, wherein the summation unit (330) summates the binary value converted by a conversion circuit (320) and the value latched by the second latch circuit.
Inventors:
HIGASHI YOSUKE
SUMITANI NORIHIKO
SUMITANI NORIHIKO
Application Number:
PCT/JP2018/041127
Publication Date:
June 06, 2019
Filing Date:
November 06, 2018
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H04N5/378; H03M1/56; H04N5/374
Foreign References:
| JP2011234326A | 2011-11-17 | |||
| JP2009038726A | 2009-02-19 | |||
| JP2011244055A | 2011-12-01 | |||
| JP2012235240A | 2012-11-29 | |||
| JP2016184893A | 2016-10-20 |
Attorney, Agent or Firm:
NII, Hiromori et al. (JP)
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