Title:
SOLID-STATE IMAGE CAPTURING DEVICE
Document Type and Number:
WIPO Patent Application WO/2022/138467
Kind Code:
A1
Abstract:
A solid-state image capturing device according to an embodiment of the present invention is provided with a first semiconductor layer and a second semiconductor layer stacked on each other. The first semiconductor layer includes, for each pixel, a photoelectric conversion part and a charge accumulation part in which a signal charge generated by the photoelectric conversion part is accumulated. The second semiconductor layer includes pixel transistors that read out the signal charges in the charge accumulation parts. The solid-state image capturing device is provided with a pixel separation section and a shared connection section. The pixel separation section is provided in the first semiconductor layer and partitions a plurality of pixels from each other. The shared connection section is provided between the second semiconductor layer and the first semiconductor layer. The shared connection section is provided across the pixel separation section and adjoins the plurality of charge accumulation parts. The individual charge accumulation parts and the shared connection section are connected to each other three-dimensionally.
Inventors:
ICHIKI TAKEJIRO (JP)
Application Number:
PCT/JP2021/046627
Publication Date:
June 30, 2022
Filing Date:
December 16, 2021
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/00; H01L21/8234; H01L27/06; H01L27/146; H04N5/3745
Domestic Patent References:
| WO2020105713A1 | 2020-05-28 | |||
| WO2020059702A1 | 2020-03-26 |
Foreign References:
| JP2018022905A | 2018-02-08 |
Attorney, Agent or Firm:
TSUBASA PATENT PROFESSIONAL CORPORATION (JP)
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