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Patent Searching and Data


Title:
SOLID-STATE IMAGING DEVICE AND ELECTRONIC INSTRUMENT
Document Type and Number:
WIPO Patent Application WO/2016/158484
Kind Code:
A1
Abstract:
The present technique relates to a solid-state imaging device and an electronic instrument in which it is possible to lower the voltage of an AD conversion circuit. This solid-state imaging device comprises: a plurality of pixels; a vertical signal line for outputting a pixel signal of each pixel; and a clip circuit that limits the voltage of the vertical signal line to a predetermined voltage. The clip circuit includes: a transistor that generates a predetermined voltage in accordance with the gate voltage; and a sample-and-hold circuit that holds a reset level of each pixel outputted to the vertical signal line, and that inputs the same to the gate of the transistor. This technique is applicable to, for example, CMOS image sensors.

Inventors:
HANZAWA KATSUHIKO (JP)
Application Number:
PCT/JP2016/058649
Publication Date:
October 06, 2016
Filing Date:
March 18, 2016
Export Citation:
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Assignee:
SONY CORP (JP)
International Classes:
H04N5/378; H04N5/359; H04N5/374
Foreign References:
JP2009194569A2009-08-27
JP2008544656A2008-12-04
JP2008042676A2008-02-21
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
Nishikawa 孝 (JP)
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