Title:
SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2018/186191
Kind Code:
A1
Abstract:
[Problem] To provide a solid-state imaging device and an electronic apparatus in which function is further improved. [Solution] A solid-state imaging device constituted by laminating, in the stated order: a first substrate in which a pixel section is formed in which pixels are arranged, a first semiconductor substrate and a first multilayer wiring layer being laminated in the first substrate; a second substrate in which a circuit having a prescribed function is formed, a second semiconductor substrate and a second multilayer wiring layer being laminated in the second substrate; and a third substrate in which a circuit is formed having a prescribed function, a third semiconductor substrate and a third multilayer wiring layer being laminated in the third substrate. The solid-state imaging device has a first connection structure in which the first substrate and the second substrate are affixed such that the first multilayer wiring layer and the second semiconductor substrate are facing each other, the circuit of the first substrate and the circuit of the second substrate being electrically connected, and the first connection structure includes a via that electrically connects, by one through hole provided from the back-surface side of the first substrate through at least the first substrate, prescribed wiring within the first multilayer wiring layer with prescribed wiring within the second or third multilayer wiring layer.
Inventors:
HORIKOSHI HIROSHI (JP)
ISHIDA MINORU (JP)
SHOHJI REIJIROH (JP)
IIJIMA TADASHI (JP)
KAMESHIMA TAKATOSHI (JP)
HASHIGUCHI HIDETO (JP)
MITSUHASHI IKUE (JP)
HANEDA MASAKI (JP)
ISHIDA MINORU (JP)
SHOHJI REIJIROH (JP)
IIJIMA TADASHI (JP)
KAMESHIMA TAKATOSHI (JP)
HASHIGUCHI HIDETO (JP)
MITSUHASHI IKUE (JP)
HANEDA MASAKI (JP)
Application Number:
PCT/JP2018/011564
Publication Date:
October 11, 2018
Filing Date:
March 23, 2018
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H01L21/3205; H01L21/768; H01L23/522; H01L25/065; H01L25/07; H01L25/18; H04N5/369
Domestic Patent References:
| WO2017038403A1 | 2017-03-09 |
Foreign References:
| JP2015135938A | 2015-07-27 | |||
| US20140264947A1 | 2014-09-18 | |||
| US20150194455A1 | 2015-07-09 | |||
| US20150145094A1 | 2015-05-28 |
Attorney, Agent or Firm:
KAMEYA, Yoshiaki et al. (JP)
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