Title:
SOLID-STATE IMAGING DEVICE AND ELECTRONIC APPARATUS
Document Type and Number:
WIPO Patent Application WO/2022/091795
Kind Code:
A1
Abstract:
The present invention proposes a favorable layout of a circuit configuration and a light receiving element. A solid-state imaging device according to an embodiment comprises: a plurality of unit pixels (110) arranged in a two-dimensional grid; an arbiter (104) that arbitrates readout for the plurality of unit pixels; and a first signal processing circuit (103) that processes a first signal outputted from each of the unit pixels. Each of the unit pixels includes a plurality of photoelectric conversion units (PD) arranged in a two-dimensional grid, and a plurality of detection circuits (210) that, on the basis of photocurrent flowing out of each of the photoelectric conversion units, detect a change in luminance of light having entered the photoelectric conversion units and output the first signal. The plurality of photoelectric conversion units are disposed on a first chip (140). At least a portion of each detection circuit, the arbiter, and the first signal processing circuit are disposed on a second chip (150) stacked on the first chip. A first region of the first chip where the plurality of photoelectric conversion units are arranged and a second region of the second chip where at least a portion of each detection circuit is arranged at least partially overlap each other in the stacking direction of the first chip and the second chip. A logic circuit including the arbiter and the first signal processing circuit is disposed in a third region of the second chip, at least a portion of the third region being adjacent to the second region.
Inventors:
MUTO ATSUSHI (JP)
ETOU SHINICHIROU (JP)
NIWA ATSUMI (JP)
YAMASHITA MASAFUMI (JP)
ETOU SHINICHIROU (JP)
NIWA ATSUMI (JP)
YAMASHITA MASAFUMI (JP)
Application Number:
PCT/JP2021/038014
Publication Date:
May 05, 2022
Filing Date:
October 14, 2021
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H04N5/3745
Domestic Patent References:
| WO2020105313A1 | 2020-05-28 |
Foreign References:
| JP2020174240A | 2020-10-22 | |||
| JP2017535999A | 2017-11-30 | |||
| JP2017535999A | 2017-11-30 |
Attorney, Agent or Firm:
SAKAI INTERNATIONAL PATENT OFFICE (JP)
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