Title:
SOLID-STATE IMAGING DEVICE AND METHOD FOR DRIVING SAME
Document Type and Number:
WIPO Patent Application WO/2014/083730
Kind Code:
A1
Abstract:
Provided are a solid-state imaging device and a method for driving same whereby the amount of time required for noise canceling can be substantially reduced. Said solid-state imaging device is provided with a signal read-out circuit and a negative-feedback circuit. The signal read-out circuit contains the following: a charge storage section that is electrically connected to a photoelectric conversion section; and a reset transistor, either the source or drain of which is electrically connected to the charge storage section. The negative-feedback circuit provides the output of the signal read-out circuit to either the source or the drain (whichever is not electrically connected to the charge storage section) of the reset transistor as negative feedback. A reset operation that dumps charge stored in the charge storage section comprises a first period and a second period after said first period. The negative-feedback circuit is in an off state during the first period and an on state during the second period. During the first period, the reset transistor transitions from an off state to an on state and then back to the off state. During the second period, a reset-transistor control voltage that gradually transitions the reset transistor to the on state is applied.
More Like This:
| WO/2021/131300 | IMAGE CAPTURE DEVICE |
| WO/2003/084213 | DISPLAY UNIFORMITY CALIBRATION SYSTEM AND METHOD FOR A STARING FORWARD LOOKING INFRARED SENSOR |
| JP2018098698 | IMAGING ELEMENT |
Inventors:
ISHII MOTONORI
MATSUNAGA YOSHIYUKI
HIROSE YUTAKA
MATSUNAGA YOSHIYUKI
HIROSE YUTAKA
Application Number:
PCT/JP2013/005188
Publication Date:
June 05, 2014
Filing Date:
September 03, 2013
Export Citation:
Assignee:
PANASONIC CORP (JP)
International Classes:
H04N5/363; H01L27/146; H04N5/369; H04N5/374
Domestic Patent References:
| WO2000019706A1 | 2000-04-06 | |||
| WO2008146236A1 | 2008-12-04 | |||
| WO2012117670A1 | 2012-09-07 | |||
| WO2011058684A1 | 2011-05-19 |
Foreign References:
| JP2012114838A | 2012-06-14 |
Attorney, Agent or Firm:
NAITO, Hiroki et al. (JP)
Hiroki Naito (JP)
Hiroki Naito (JP)
Download PDF:
Previous Patent: MACRO-POROUS MONOLITH AND METHOD FOR PRODUCING SAME
Next Patent: METHOD FOR MANUFACTURING DISPLAY APPARATUS
Next Patent: METHOD FOR MANUFACTURING DISPLAY APPARATUS