Title:
SOLID-STATE IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2012/005014
Kind Code:
A1
Abstract:
Provided is a laminated solid-state imaging device that is capable of minimizing mixed signals between unit pixel cells due to electrical capacitive coupling. A unit pixel cell (13) comprises: a photoelectric conversion layer (6) and a pixel electrode (5) formed on a silicon substrate (1); an amplifying transistor (10) that is formed inside the silicon substrate (1), and outputs a signal voltage based on the potential of the pixel electrode (5); and a reset transistor (11) that is formed inside the silicon substrate (1), and resets the potential of a gate electrode (3) of the amplifying transistor (10). The solid-state imaging device is provided with: vertical signal lines (17) that are disposed so as to correspond to columns of unit pixel cells (13), and transmit the signal voltages of the corresponding column of unit pixel cells (13); and a vertical scanning unit (15) that selects rows of unit pixel cells (13) to output signal voltages to the vertical signal lines (17). Each vertical signal line (17) is positioned below the pixel electrodes (5) of the unit pixel cells (13) corresponding to the vertical signal line (17).
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Inventors:
MATSUNAGA YOSHIYUKI
Application Number:
PCT/JP2011/003948
Publication Date:
January 12, 2012
Filing Date:
July 08, 2011
Export Citation:
Assignee:
PANASONIC CORP (JP)
MATSUNAGA YOSHIYUKI
MATSUNAGA YOSHIYUKI
International Classes:
H01L27/146
Foreign References:
| JP2009212377A | 2009-09-17 | |||
| JP2006191007A | 2006-07-20 | |||
| JPH11121731A | 1999-04-30 | |||
| JPH09275201A | 1997-10-21 |
Attorney, Agent or Firm:
NII, Hiromori (JP)
New house Extensive 守 (JP)
New house Extensive 守 (JP)
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Claims:
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