Title:
SOLID-STATE IMAGING DEVICE
Document Type and Number:
WIPO Patent Application WO/2015/111368
Kind Code:
A1
Abstract:
In order to improve reading speed, this solid-state imaging device is provided with: a plurality of first latch circuits (213) that hold first pixel data; a plurality of first driver circuits (214) that output corresponding first pixel data to first read bit lines (RBL1, NRBL1); a plurality of second latch circuits (213) that hold second pixel data; a plurality of second driver circuits (214) that output corresponding second pixel data to second read bit lines (RBL2, NRBL2); a second sense amplifier (210B) that generates second data by amplifying the voltage of the second read bit lines (RBL2, NRBL2); an intermediate latch circuit (217) that holds the second data; and an intermediate driver circuit (218) that outputs the second data that is held by the intermediate latch circuit (217) to the first read bit lines (RBL1, NRBL1).
Inventors:
SUMITANI NORIHIKO
KANEHARA HIDENARI
NISHITANI TAKAYUKI
KANEHARA HIDENARI
NISHITANI TAKAYUKI
Application Number:
PCT/JP2015/000006
Publication Date:
July 30, 2015
Filing Date:
January 05, 2015
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H04N5/374; H04N5/378
Foreign References:
| JP2011171889A | 2011-09-01 | |||
| JP2012060334A | 2012-03-22 | |||
| JP2011019136A | 2011-01-27 |
Attorney, Agent or Firm:
FUJII, Kentaro et al. (JP)
Fujii Kentaro (JP)
Fujii Kentaro (JP)
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