Title:
SOLID-STATE IMAGING ELEMENT, METHOD FOR PRODUCING SOLID-STATE IMAGING ELEMENT, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2018/034092
Kind Code:
A1
Abstract:
To reduce the likelihood of a decrease in image quality in a solid-state imaging element such as a backside-illuminated CMOS image sensor, etc. A solid-state imaging element, provided with: a semiconductor substrate in which a plurality of pixels, each having a photoelectric conversion unit, are arranged along the planar direction; and a wiring layer formed by lamination on the surface, on the opposite side from a light entry surface, of the semiconductor substrate. The wiring layer includes a structural body having a reflection surface for reflecting light entering from the side of the semiconductor substrate towards the semiconductor substrate. The plurality of pixels has a periodic structure in which one or a plurality of pixels form the smallest units. In the structural body, there is no regularity to the reflection surface coverage ratio in each of the pixels with regards to a plurality of pixels included in a unit region greater than the smallest units.
Inventors:
KUROGI SYOGO (JP)
Application Number:
PCT/JP2017/025738
Publication Date:
February 22, 2018
Filing Date:
July 14, 2017
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H04N5/357; H04N5/369; H04N5/374
Domestic Patent References:
| WO2013172232A1 | 2013-11-21 |
Foreign References:
| JP2015026786A | 2015-02-05 | |||
| JP2011243665A | 2011-12-01 | |||
| JP2015029012A | 2015-02-12 | |||
| JP2014096540A | 2014-05-22 | |||
| JP2012256736A | 2012-12-27 |
Attorney, Agent or Firm:
MATSUO Kenichiro (JP)
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