Title:
SOLID-STATE IMAGING ELEMENT, METHOD FOR MANUFACTURING SAME, AND ELECTRONIC DEVICE
Document Type and Number:
WIPO Patent Application WO/2020/066683
Kind Code:
A1
Abstract:
The present invention pertains to a solid-state imaging element, a method for manufacturing same, and an electronic device which enable waste in the manufacturing process to be reduced and costs to be minimised. This solid-state imaging element is provided with a sensor substrate on which a plurality of pixels are formed, and a logic substrate on which at least a logic circuit is formed. Moreover, a step of picking good sensor substrates and bonding the same to a logic wafer, that has not yet been separated into individual logic substrates and that has a plurality of logic circuits formed thereon, is carried out, and as a result thereof, the sensor substrates and the logic substrates are given a stack structure. This feature can be applied, for example, to a rear surface irradiation-type stacked CMOS image sensor.
Inventors:
NAKAMURA YUTA (JP)
Application Number:
PCT/JP2019/036034
Publication Date:
April 02, 2020
Filing Date:
September 13, 2019
Export Citation:
Assignee:
SONY SEMICONDUCTOR SOLUTIONS CORP (JP)
International Classes:
H01L27/146; H01L23/14; H01L25/04; H01L25/065; H01L25/07; H01L25/18; H04N5/369
Domestic Patent References:
WO2018047635A1 | 2018-03-15 |
Foreign References:
US20180040658A1 | 2018-02-08 | |||
JP2014099582A | 2014-05-29 | |||
JP2016134587A | 2016-07-25 | |||
JP2016171297A | 2016-09-23 |
Attorney, Agent or Firm:
NISHIKAWA Takashi et al. (JP)
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