Technical Field

[0001] Embodiments of the invention are in the field of semiconductor devices and, in particular, memory.

Background

[0002] Some magnetic memories, such as a spin transfer torque memory (STTM), utilize a magnetic tunnel junction (MTJ) for switching and detection of the memory's magnetic state. Figure 1 includes spin transfer torque random access memory (STTRAM), a form of STTM. Figure 1 includes a MTJ consisting of ferromagnetic (FM) layers 125, 127 and tunneling barrier 126 (e.g., magnesium oxide (MgO)). The MTJ couples bit line (BL) 105 to selection switch 120 (e.g., transistor), word line (WL) 110, and sense line (SL) 115. Memory 100 is "read" by assessing the change of resistance (e.g., tunneling magnetoresi stance (TMR)) for different relative magnetizations of FM layers 125, 127.

[0003] More specifically, MTJ resistance is determined by the relative magnetization directions of layers 125, 127. When the magnetization directions between the two layers are anti-parallel, the MTJ is in a high resistance state. When the magnetization directions between the two layers are parallel, the MTJ is in a low resistance state. Layer 127 is the "reference layer" or "fixed layer" because its magnetization direction is fixed. Layer 125 is the "free layer" because its magnetization direction is changed by passing a driving current polarized by the reference layer (e.g., positive voltage applied to layer 127 rotates the magnetization direction of layer 125 opposite to that of layer 127 and negative voltage applied to layer 127 rotates the magnetization direction of layer 125 to the same direction of layer 127).

Brief Description of the Drawings

[0004] Features and advantages of embodiments of the present invention will become apparent from the appended claims, the following detailed description of one or more example embodiments, and the corresponding figures, in which:

[0005] Figure 1 depicts a conventional magnetic memory cell.

[0006] Figures 2-3 depict conventional MTJs.

[0007] Figure 4 includes a memory stack in an embodiment. [0008] Figures 5A, 5B, 5C, 5D include embodiments of free layers.

[0009] Figure 6 includes a memory cell in an embodiment.

[0010] Figure 7 depicts a method of forming a memory in an embodiment.

[0011] Figures 8, 9, 10 depict systems for use with embodiments.

Detailed Description

[0012] Reference will now be made to the drawings wherein like structures may be provided with like suffix reference designations. In order to show the structures of various embodiments more clearly, the drawings included herein are diagrammatic representations of integrated circuit structures. Thus, the actual appearance of the fabricated integrated circuit structures, for example in a photomicrograph or atom probe image, may appear different while still incorporating the claimed structures of the illustrated embodiments. Moreover, the drawings may only show the structures useful to understand the illustrated embodiments. Additional structures known in the art may not have been included to maintain the clarity of the drawings. "An embodiment", "various embodiments" and the like indicate embodiment s) so described may include particular features, structures, or characteristics, but not every embodiment necessarily includes the particular features, structures, or characteristics. Some embodiments may have some, all, or none of the features described for other embodiments. "First", "second", "third" and the like describe a common object and indicate different instances of like objects are being referred to. Such adjectives do not imply objects so described must be in a given sequence, either temporally, spatially, in ranking, or in any other manner. "Connected" may indicate elements are in direct physical or electrical contact with each other and "coupled" may indicate elements co-operate or interact with each other, but they may or may not be in direct physical or electrical contact. Also, while similar or same numbers may be used to designate same or similar parts in different figures, doing so does not mean all figures including similar or same numbers constitute a single or same embodiment.

[0013] STTRAM, described above, is just one example of "beyond CMOS" technology (or "non-CMOS based" technology), which relates to devices and processes not entirely implemented with complementary metal-oxide-semiconductor (CMOS) techniques. Beyond CMOS technology may rely on spin polarization (which concerns the degree to which the spin or intrinsic angular momentum of elementary particles is aligned with a given direction) and, more generally, spintronics (a branch of electronics concerning the intrinsic spin of an electron, its associated magnetic moment, and the electron's fundamental electronic charge). Spintronics devices may concern TMR, which uses quantum-mechanical tunneling of electrons through a thin insulator to separate ferromagnetic layers, and STT, where a current of spin polarized electrons may be used to control the magnetization direction of ferromagnetic electrodes.

[0014] Beyond CMOS devices include, for example, spintronics devices implemented in memory (e.g., 3 terminal STTRAM), spin logic devices (e.g., logic gates), tunnel field-effect transistors (TFETs), impact ionization MOS (JJVIOS) devices, nano-electro-mechanical switches (NEMS), negative common gate FETs, resonant tunneling diodes (RTD), single electron transistors (SET), spin FETs, nanomagnet logic (NML), domain wall logic, domain wall memory, magnetic sensors, and the like.

[0015] Regarding STTM specifically, one form of STTM includes perpendicular STTM (pSTTM). Where a traditional MTJ or non-perpendicular MTJ generates a magnetization "in plane" (with which "high" and "low" memory states are set), a perpendicular MTJ (pMTJ) generates magnetization "out of plane". This reduces the switching current needed to switch between high and low memory states. This also allows for better scaling (e.g., smaller size memory cells). Traditional MTJs are converted to pMTJs by, for example, thinning the free layer, thereby making the tunnel barrier/free layer interface more dominant in magnetic field influence (and the interface promotes anisotropic out of plane magnetization). The interface is highlighted with bold dashed lines and ¾ in Figure 2 (and other figures included herein) which addresses the anisotropic energy at the interface. Figure 2 includes such a system 200 with cobalt, iron, boron (CoFeB) free layer 225 interfacing magnesium oxide (MgO) tunnel barrier 226, which further couples to CoFeB fixed layer 227 and Tantalum (Ta) contacts 214 (which may couple to a selection switch such as transistor 120 of Figure 1), 216 (which may couple, by way of one or more vias, to a bit line such as bit line 105 of Figure 1).

[0016] Figure 3 depicts a system 300 with a MTJ, where a second oxidized MgO interface 320 (sometimes referred to as a "cap layer") contacts CoFeB free layer 325 (which further couples to a tunnel barrier MgO 326, which is formed on CoFeB fixed layer 327). Lack of thermal stability is a problem for devices such as the device of Figure 2A. However, adding cap layer 320 may increase thermal stability for the memory. [0017] Thermal stability is a metric associated with the retention of stored data in pSTTM devices for a certain period of time at certain environmental conditions. Thermal stability, as used herein, is determined as follows:

_{Δ =} _^ ₌ KeffV

k _B T k _B T where K _e ff is effective PMA of the storage layer, V is the volume of the layer, T is temperature, E denotes the energy barrier between two magnetization configurations of the MTJ, and k _B is Boltzmann constant. The thermal stability Δ is directly related to K _e ff.

[0018] Returning to Figure 3, system 300 includes MgO at both free layer interfaces (i.e., layers 320, 326). However, introducing MgO layer 320 on top of CoFeB free layer 325 increases the memory's total resistance significantly (as compared to having just one oxide layer interface the free layer as in Figure 2), which makes the design impractical for scaled devices (e.g., 22 nm) because of degradation in resistance-area (RA) product and TMR. In other words, if MgO layer 326 is predominately responsible for resistance and voltage drop in conventional MTJs, adding yet another layer of MgO in series with layer 326 increases RA product, thereby driving up write voltage, decreasing battery life, decreasing TMR, and the like.

[0019] RA product refers to a measurement unequal to resistivity. Resistivity has units in ohm-cm, whereas RA product has units in ohm-um ² (and is based on material resistivity (p), dot area (A), and MgO thickness (T _Mg o) such that increasing MgO thickness exponentially increases the RA product of the device). While resistivity represents an "inherent resistance" and is independent of the thickness of a material layer, RA product is exponentially proportional to the thickness of the material (e.g., MgO thickness). (Regarding "thickness", layer 320 is disposed "horizontally" for purposes of discussion herein and has a "thickness" in the vertical orientation. The length and width for layer 320 are "in plane" and the height or thickness is "out of plane".)

[0020] Returning to Figure 3, a higher RA product increases STTM resistance. While this does not necessarily increase write current, a higher RA product does increase write voltage (write voltage = Jc * RA product)(Jc refers to a critical switching current density to write a bit), which may be problematic for switching devices (e.g., transistor 120 of Figure 1) which have voltage restrictions. Also, a larger STTM resistance degrades current provided by a select transistor (e.g., MOS transistor 120 of Figure 1) since the Gate-to- Source voltage is smaller due to the larger IR drop across the STTM resistance. Further, there is RA product contribution from layers 320 and 326. While increasing the RA product from layer 326 will not lower TMR, increasing the RA product from layer 320 will lower TMR (and decreasing the RA product from layer 320 will increase TMR).

[0021] Applicant has determined that adding a "stability boost magnet" layer above the cap layer may provide stability to memory. This additional magnet layer may include CoFeB. In such an embodiment, both the boost magnet layer and the free layer (and possibly the fixed layer) may each include CoFeB.

[0022] However, despite the additions of cap layer 320 (which increases resistance in the memory stack) and/or a stability boost magnet to boost thermal stability, Applicant has determined memories such as memory 300 (with or without a stability boost magnet) still lack sufficient thermal stability. More specifically, Applicant determined a first problem exists because MgO is used as the cap oxide 320 to achieve interfacial perpendicular magnetic anisotropy (PMA) through the hybridization of iron (from the free layer 325) and oxygen (from the cap layer 320). However, the MgO cap 320 is an insulator and adds series resistance to the stack 300, which causes the reduction of TMR and increase of RA product. Applicant determined a second a problem exists because the benefits from MgO cap 320 are somewhat diminished due to gettering of oxygen from layer 320 by a metal electrode located on cap layer 320. In other words, an electrode comprising, for example, tantalum will cause the precipitation of oxygen from layer 320 upwards to the tantalum electrode (due to the high affinity tantalum has for oxygen). Applicant determined this in turn leads to diminished thermal stability for the memory because, due to the precipitation, there is not sufficient oxygen in the cap layer to hybridize with iron from the free layer (and this negatively affects PMA and thermal stability).

[0023] Applicant addresses the oxygen precipitation (and consequent decrease in thermal stability) by doping the MgO cap 320 with a noble and/or semi-noble metal. First, the doped oxide cap reduces the resistance of the MgO cap and achieves TMR improvement and RA product reduction (which addresses the first problem identified above). Second, the metal of the doped oxide cap also prevents or diminishes oxygen gettering/precipitation from the cap oxide to the upper electrode (which addresses the second problem identified above). By diminishing this oxygen precipitation, there remains in the cap oxide (at the free magnetic layer/MgO cap interface) sufficient oxygen to boost the PMA and thermal stability (K _e ff) through hybridization between iron (from the MTJ' s free layer) and oxygen (which has remained in the cap layer instead of precipitating upwards towards the upper electrode).

[0024] Figure 4 includes an embodiment that addresses the problem (identified by Applicant) of low TMR, higher RA product, lower PMA, and lower thermal stability associated with oxygen precipitation from oxide cap layers that are located on MTJs. In an embodiment memory 400 includes a MTJ 41 1 including a free magnetic layer 405, a fixed magnetic layer 403, and a tunnel barrier layer 404 between the free and fixed layers. Layer 426 including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof. For example, layer 426 may include ruthenium. First oxide layer 406 comprises MgO. Layer 406 is between layer 426 and the MTJ 41 1. Layer 406 directly contacts both the free magnetic layer 405 and layer 426. Second oxide layer 416, comprising MgO, is between the layer 426 and the additional magnetic layer 407 (e.g., stability boost magnet that helps stabilize the memory state of memory 400). Layer 416 directly contacts the layer 426. Memory stack 400 further includes first contact layer 401 and second contact layer. Layer 407 is between the layer 426 and the second contact layer 410. In an embodiment the second oxide layer 416 directly contacts the additional magnetic layer 407.

[0025] In an embodiment the tunnel barrier layer 404 includes MgO; and the free magnetic layer 405 and the additional magnetic layer 407 each include cobalt and iron. Layers 405 and/or 407 may each include varying levels of boron depending on how much, if any, boron has precipitated out of those layers into surrounding layers based on anneal temperatures, anneal times, and the like for stack 400. In other embodiments one or both of layers 405, 407 may be a composite layer including alternating layers that respectively include cobalt and (a) palladium and/or (b) platinum.

[0026] In an embodiment first and second contact layers 401, 410 include a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof. For example, first and second contact layers 401, 410 may each include tantalum. The tantalum has a high affinity for oxygen, such as the oxygen of MgO. While the oxygen of layer 416 may still precipitate towards the tantalum of contact 410, the oxygen of layer 406 will be protected from such precipitation due to a metal with low affinity for oxygen (e.g., ruthenium, tungsten, or molybdenum) in layer 426. As a result, oxygen in layer 406 is available for hybridization with iron from free magnetic layer 405, which promotes higher PMA and thermal stability.

[0027] An embodiment may include a pinning layer 402, otherwise known as a Synthetic Antiferromagnetic layer (SAF).

[0028] Due to layer 426 preventing oxygen precipitation from layer 406 to contact 410, the first oxide layer 406 may include more oxygen atomic mass than the second oxide layer 416 in some embodiments. This may be absolute regardless of thickness of layers 406, 416. In other embodiments this may be a percentage. In other words, the first oxide layer 406 includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second layer 416. Thus, even though layer 416 may be thicker than layer 406 in some embodiment the percentage of oxygen in the relatively thinner layer 406 will be greater than the percentage of oxygen in the relatively thicker layer 416.

[0029] In an embodiment, a side of the first oxide layer 406, which directly contacts the free magnetic layer 405, is primarily located in a plane 436. The first oxide layer has a first thickness 406' that is orthogonal to the plane 436; the second oxide layer has a second thickness 416'; and the layer has a third thickness 426' that is less than the first thickness 406' . In an embodiment the third thickness 426' is less than the second thickness 416' and the first thickness 406' . In an embodiment the third thickness 426' is less than two monolayers thick (where a "monolayer" is a layer 1 molecule thick). In other embodiments the third thickness 426' is less than or equal to a single monolayer thick. In other embodiments the third thickness 426' is less than or equal to 2 monolayers thick. The thinness of layer 426 may be critical in some embodiments because if layer 426 becomes too thick (i.e., greater than or equal to 3 monolayers) layer 426 may disconnect layer 406 and/or layer 416. In an embodiment thickness 406' is between 5 to 15 angstroms, thickness 416' is between 5 to 15 angstroms, and thickness 426' is between 0.5 to 3 angstroms. [0030] The relationship between thicknesses 406', 416', 426' is critical in some embodiments.

[0031] For instance, thicknesses 406', 416' must be thick enough to promote PMA yet not so thick as to overly increase series resistance for the oxide cap layer that is comprised of layers 406, 416, and 426. For example, based on annealing temperature, duration of anneal, and the like for stack 400 some of the metal of layer 426 migrates out from layer 426 into layers 406 and/or 416. In doing so the metal forms projections within the oxide layers 406 and/or 416. The projections may include voids formed by the passing of the metal atoms through the oxide layers and/or the projections may include the metal atoms themselves that precipitated or more generally projected from the metal layer 426 into oxide layers 406 and/or 416. In an embodiment the projections make a micro shorting path for electric current and lower the resistance of the oxide layers, which eventually reduce the series resistance (e.g., a projection may form a current path of lower resistance relative to the rest of the oxide layer) for the stack 400. This causes a greater percentage of the resistance drop to occur across the spin filter (i.e., tunnel barrier 404), which increases TMR and lowers the RA product contribution from the cap layer (comprised of layers 406, 416, 426) for the memory stack.

[0032] The projections (which may, for example, include voids, fractures, and/or the metal/metal oxides of layer 426) may extend from the metal layer 426 partially into the portion of the oxide layers 406, 416 which are immediately adjacent to layer 426. However, the projections may also extend across a majority of the oxide layers 406, 416. Should layers 406 and/or 416 be too thick the projection may extend across the layer or layers to a lesser extent and consequently have a lesser effect on lowering series resistance for the cap layer comprised of layers 406, 416, 426.

[0033] The projection from layer 426 may be contiguous or non-contiguous. For example, when the projection is imaged with a technique, such as an atom probe-based technique, the resulting image may show individual metal atoms that are primarily located within layer 426 (or voids created by the passage of such atoms or due to the impact from such atoms). However, the image may also include clusters of metal atoms and/or individual metal atoms that have moved from layer 426 into the oxide layer(s) 406 and/or 416. Thus, a projection as used herein is not to be construed in a literal sense entailing, for example, a mechanical spike used to secure two structures to each other but instead entails atoms projecting through another layer thereby causing damage to the layer and decreasing the resistance of the layer.

[0034] Further, thickness 426' must be thick enough to adequately prevent oxygen migration from layer 406 to contact 410 yet be thin enough so as to not negate the PMA advantages offered by layers 406, 416.

[0035] Further still, if layers 406, 416, 426 collectively are too thick magnet layer 407 may not couple magnetically to the free layer 405 due to the distance between layers 405, 407 (which may decrease stability benefits of layer 407). Also, an embodiment provides that the magnet layer 407 needs to be thick enough so that it is indeed magnetic (e.g., at least 5-6 angstroms thick to be somewhat magnetic and thicker than 10 angstroms where greater magnetic field is beneficial).

[0036] Thus, as explained above regarding some embodiments, the combinations of thicknesses cooperate in a critical manner to properly balance PMA, TMR, resistance (RA product), and/or thermal stability.

[0037] In an embodiment the additional magnetic layer 407 is a composite layer including alternating layers that respectively include cobalt and platinum. In an embodiment the additional magnetic layer 407 is a composite layer including alternating layers that respectively include cobalt and palladium.

[0038] Various embodiments may be used with various forms of free layers. For example, in Figure 5A the free layer is a single layer 501 (approximately 1.0 nm thick) including CoFeB. Figure 5B includes an embodiment where the free layer is a composite layer including a first layer 511 (approximately 1.55 nm thick) comprising boron and a second layer 512 (approximately 0.3 nm thick) comprising tungsten. Figure 5C includes an embodiment where the free layer is a composite layer including a first layer 521 (approximately 1.55 nm thick) comprising boron, a second layer 522 comprising tungsten (approximately 0.3 nm thick), and a third layer 523 (approximately 0.3 nm thick) comprising boron. Figure 5D includes an embodiment wherein (a) the free layer is a composite layer including first 531 (approximately 0.5 nm thick) and second layers 532 (approximately 0.4 nm thick), (b) the first layer is between the second layer and the tunnel barrier layer (not shown), and (c) the first layer includes a chemical composition with a higher percentage of boron (e.g., 30%) than a chemical composition of the second layer (e.g., 20%). Any of the exemplary free layers in any of Figures 5 A, 5B, 5C, 5D may be substituted for layer 405 of the embodiment of Figure 4.

[0039] In an embodiment the free layer is a composite layer including first and second layers, the first layer is between the second layer and the tunnel barrier layer, and the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer. For instance, in Figure 5D layer 531 has a thickness 541 (e.g., 0.5 nm) that is thicker than thickness 542 (e.g., 0.4 nm) for layer 532.

[0040] An embodiment may include a cladding layer between the contact layers 401, 410. Such a layer may include, for example, tantalum. A cladding layer, as used herein, is a layer that substantially covers a portion of a structure, such as memory 400. In some embodiments a cladding layer may serve as a contact layer (so that layer 410 may be unnecessary) or may serve as an adhesion layer for the top contact 410 and may include, for example, tantalum.

[0041] An embodiment may include an additional MgO layer on top of magnet layer 407. The additional MgO layer may include sublayers of MgO (similar to layers 406, 416) and metal (similar to layer 426) to prevent added RA product.

[0042] Returning to Figure 4, in an embodiment the tunnel barrier layer 404 and the oxide layers 406, 416 both include magnesium oxide. However, in other embodiments layer 404 and/or layers 406, 416 may include aluminum oxide (A1 ₂ 0 ₃ ), and/or MgAlOx.

[0043] Figure 4 is an example of an embodiment whereby a multilayer cap oxide (such as the cap oxide formed by layers 406, 416, 426) is formed adjacent a boost magnet layer 407. Such a combination of layers induces increased stability without unnecessarily increasing RA product and/or decreasing TMR (as is the case with the dual MgO layers found in Figure 3). In other words, this arrangement of layers (composite cap layer and boost magnet layer) induces greater stability without overly increasing RA product (which may adversely affect write/read voltages) or diminishing TMR (which may complicate accurate reads of memory states).

[0044] Figure 6 depicts an embodiment wherein memory 800 comprises a perpendicular STTM that includes MTJ 811. The MTJ has perpendicular anisotropy. The memory cell includes a 1T-1X (T = transistor, X = capacitor or resistor) at a small cell size. The MTJ comprises contacts 801, 810, pinning layer 802, fixed layer 803, tunnel barrier layer 804, free layer 805, oxide layers 806, 816, layer 826 (including a metal such as ruthenium), stability boost magnet layer 807 (which, in some embodiments, includes alternating cobalt and platinum or palladium layers to enhance stability for the small film MTJ). The MTJ couples bit line 825 to selection switch 821 (e.g., transistor), word line 820, and sense line 815. The MTJ may be located on a substrate.

[0045] In an embodiment, the substrate is a bulk semiconductive material as part of a wafer. In an embodiment, the semiconductive substrate is a bulk semiconductive material as part of a chip that has been singulated from a wafer. In an embodiment, the semiconductive substrate is a semiconductive material that is formed above an insulator such as a semiconductor on insulator (SOI) substrate. There may be one or more layers between the MTJ and the substrate. There may be one or more layers above the MTJ.

[0046] Figure 7 includes a method 700 in an embodiment. Block 701 includes forming a first contact layer. Block 702 includes forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers. Block 703 includes forming a first oxide layer directly contacting the free magnetic layer. Block 704 includes forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof. Block 705 includes forming a second oxide layer on the layer. Block 706 includes forming a second contact layer on the second oxide layer.

[0047] Referring now to Figure 8, shown is a block diagram of an example system with which embodiments can be used. As seen, system 900 may be a smartphone or other wireless communicator or any Internet of Things (IoT) device. A baseband processor 905 is configured to perform various signal processing with regard to communication signals to be transmitted from or received by the system. In turn, baseband processor 905 is coupled to an application processor 910, which may be a main CPU of the system to execute an OS and other system software, in addition to user applications such as many well-known social media and multimedia apps. Application processor 910 may further be configured to perform a variety of other computing operations for the device. [0048] In turn, application processor 910 can couple to a user interface/display 920 (e.g., touch screen display). In addition, application processor 910 may couple to a memory system including a non-volatile memory, namely a flash memory 930 (which may include memory cells such as those described in Figures 4 and/or 6) and a system memory, namely a DRAM 935 (which may include memory cells such as those described in Figures 4 and/or 6). In some embodiments, flash memory 930 may include a secure portion 932 (which may include memory cells such as those described in Figures 4 and/or 6) in which secrets and other sensitive information may be stored. As further seen, application processor 910 also couples to a capture device 945 such as one or more image capture devices that can record video and/or still images.

[0049] A universal integrated circuit card (UICC) 940 comprises a subscriber identity module, which in some embodiments includes a secure storage 942 (which may include memory cells such as those described in Figures 4 and/or 6) to store secure user information. System 900 may further include a security processor 950 (e.g., Trusted Platform Module (TPM)) that may couple to application processor 910. A plurality of sensors 925, including one or more multi-axis accelerometers may couple to application processor 910 to enable input of a variety of sensed information such as motion and other environmental information. In addition, one or more authentication devices 995 may be used to receive, for example, user biometric input for use in authentication operations.

[0050] As further illustrated, a near field communication (NFC) contactless interface 960 is provided that communicates in a NFC near field via an NFC antenna 965. While separate antennae are shown, understand that in some implementations one antenna or a different set of antennae may be provided to enable various wireless functionalities.

[0051] A power management integrated circuit (PMIC) 915 couples to application processor 910 to perform platform level power management. To this end, PMIC 915 may issue power management requests to application processor 910 to enter certain low power states as desired. Furthermore, based on platform constraints, PMIC 915 may also control the power level of other components of system 900.

[0052] To enable communications to be transmitted and received such as in one or more IoT networks, various circuitries may be coupled between baseband processor 905 and an antenna 990. Specifically, a radio frequency (RF) transceiver 970 and a wireless local area network (WLAN) transceiver 975 may be present. In general, RF transceiver 970 may be used to receive and transmit wireless data and calls according to a given wireless communication protocol such as 3G or 4G wireless communication protocol such as in accordance with a code division multiple access (CDMA), global system for mobile communication (GSM), long term evolution (LTE) or other protocol. In addition a GPS sensor 980 may be present, with location information being provided to security processor 950 for use as described herein when context information is to be used in a pairing process. Other wireless communications such as receipt or transmission of radio signals (e.g., AM/FM) and other signals may also be provided. In addition, via WLAN transceiver 975, local wireless communications, such as according to a Bluetooth™ or IEEE 802.11 standard can also be realized.

[0053] Referring now to Figure 9, shown is a block diagram of a system in accordance with another embodiment of the present invention. Multiprocessor system 1000 is a point-to-point interconnect system such as a server system, and includes a first processor 1070 and a second processor 1080 coupled via a point-to-point interconnect 1050. Each of processors 1070 and 1080 may be multicore processors such as SoCs, including first and second processor cores (i.e., processor cores 1074a and 1074b and processor cores 1084a and 1084b), although potentially many more cores may be present in the processors. In addition, processors 1070 and 1080 each may include a secure engine 1075 and 1085 to perform security operations such as attestations, IoT network onboarding or so forth.

[0054] First processor 1070 further includes a memory controller hub (MCH) 1072 and point-to-point (P-P) interfaces 1076 and 1078. Similarly, second processor 1080 includes a MCH 1082 and P-P interfaces 1086 and 1088. MCH's 1072 and 1082 couple the processors to respective memories, namely a memory 1032 and a memory 1034, which may be portions of main memory (e.g., a DRAM) locally attached to the respective processors. These memories may include memory cells such as those described in Figures 4 and/or 6. First processor 1070 and second processor 1080 may be coupled to a chipset 1090 via P-P interconnects 1052 and 1054, respectively. Chipset 1090 includes P-P interfaces 1094 and 1098. [0055] Furthermore, chipset 1090 includes an interface 1092 to couple chipset 1090 with a high performance graphics engine 1038, by a P-P interconnect 1039. In turn, chipset 1090 may be coupled to a first bus 1016 via an interface 1096. Various input/output (I/O) devices 1014 may be coupled to first bus 1016, along with a bus bridge 1018 which couples first bus 1016 to a second bus 1020. Various devices may be coupled to second bus 1020 including, for example, a keyboard/mouse 1022, communication devices 1026 and a data storage unit 1028 such as a non-volatile storage or other mass storage device (which may include memory cells such as those described in Figures 4 and/or 6). As seen, data storage unit 1028 may include code 1030, in one embodiment. As further seen, data storage unit 1028 also includes a trusted storage 1029 (which may include memory cells such as those described in Figures 4 and/or 6) to store sensitive information to be protected. Further, an audio I/O 1024 may be coupled to second bus 1020.

[0056] Embodiments may be used in environments where IoT devices may include wearable devices or other small form factor IoT devices. Referring now to Figure 10, shown is a block diagram of a wearable module 1300 in accordance with another embodiment. In one particular implementation, module 1300 may be an Intel® Curie™ module that includes multiple components adapted within a single small module that can be implemented as all or part of a wearable device. As seen, module 1300 includes a core 1310 (of course in other embodiments more than one core may be present). Such core may be a relatively low complexity in-order core, such as based on an Intel Architecture® Quark™ design. In some embodiments, core 1310 may implement a TEE as described herein. Core 1310 couples to various components including a sensor hub 1320, which may be configured to interact with a plurality of sensors 1380, such as one or more biometric, motion environmental or other sensors. A power delivery circuit 1330 is present, along with a non-volatile storage 1340 (which may include memory cells such as those described in Figures 4 and/or 6). In an embodiment, this circuit may include a rechargeable battery and a recharging circuit, which may in one embodiment receive charging power wirelessly. One or more input/output (IO) interfaces 1350, such as one or more interfaces compatible with one or more of USB/SPI/I2C/GPIO protocols, may be present. In addition, a wireless transceiver 1390, which may be a Bluetooth™ low energy or other short-range wireless transceiver is present to enable wireless communications as described herein. Understand that in different implementations a wearable module can take many other forms. Wearable and/or IoT devices have, in comparison with a typical general purpose CPU or a GPU, a small form factor, low power requirements, limited instruction sets, relatively slow computation throughput, or any of the above.

[0057] While several embodiments herein describe perpendicular STTM, other embodiments are not so limited and may concern in plane (non-perpendicular) STTM, as well as embodiments that are neither fully in plane (non-perpendicular) nor fully out of plane (perpendicular) but are instead something in between in plane and out of plane.

[0058] At times herein a first layer (e.g., oxide layer 406) is said to "directly contact" a second layer (e.g., free layer 405). This includes situations where one considers, for example, the first layer to be a sublayer of another layer (e.g., oxide layer 406 is sublayer of the composite cap layer comprising layers 406, 416, 426). Further, for instance, the second layer may include oxidation at its surface/interface to the first layer. Such a situation would still comprise a first layer directly contacting the second layer despite the second layer including surface oxidation.

[0059] While several embodiments include fixed and free layers comprising CoFeB, other embodiments may include some combination of the fixed and free layers and boost magnet including CoFe/CoFeB (e.g., two of the three layers include CoFe and the other includes CoFeB or one or more of the layers includes both CoFe and CoFeB); CoFeB/Ta/CoFeB; or CoFe/CoFeB/Ta/CoFeB/CoFe. Further, other embodiments may include tunnel barriers having something other than MgO, such as other oxides (e.g., aluminum oxide). Some embodiments may include magnetic layers 405 and/or 407 that do not include cobalt (e.g., may include FeB).

[0060] The following examples pertain to further embodiments.

[0061] Example 1 includes an apparatus comprising: a magnetic tunnel junction (MTJ) including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, copper, or combinations thereof; a first oxide layer, comprising magnesium oxide (MgO), which (a)(i) is between the layer and the MTJ, and (a)(ii) directly contacts both the free magnetic layer and the layer. [0062] Example 2 includes the apparatus of example 2 comprising: first and second contact layers; and an additional magnetic layer between the layer and the second contact layer.

[0063] Example 3 includes the apparatus of example 2 comprising a second oxide layer, comprising MgO, which (b)(i) is between the layer and the additional magnetic layer, and (a)(ii) directly contacts the layer.

[0064] Thus, example 3 illustrates that not all embodiments include multiple oxide layers within the cap oxide layer. For example, in some embodiments layer 416 is omitted. In such a case layer 426 still prevents oxygen precipitation from layer 406 towards contact layer 410 (or any other layer with a strong affinity for oxygen and which is above layer 406). In such a case layer 406 may be thickened to account for the lack of layer 416 (i.e., thickness of layer 406 may be increased to offset loss of stability that would otherwise be present if layer 416 were included). Thus, in an embodiment layer 406 may be more than 15 angstroms while layer 426 may still be 2 monolayers or less.

[0065] Other embodiments may include a cap oxide layer that includes oxide layers 406, 416 and the layer including a metal (layer 426) as well as additional oxide layers and or layers including metals with low affinity for oxygen).

[0066] Example 4 includes the apparatus of example 3 wherein the second oxide layer directly contacts the additional magnetic layer.

[0067] Example 5 includes the apparatus of example 4 wherein the second contact layer includes a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.

[0068] Example 6 includes the apparatus of example 4 wherein: a side of the first oxide layer, which directly contacts the free magnetic layer, is primarily located in a plane; and the first oxide layer has a first thickness that is orthogonal to the plane; the second oxide layer has a second thickness; the layer has a third thickness that is less than the first thickness.

[0069] Example 7 includes the apparatus of example 6 wherein the third thickness is less than the second thickness. [0070] Example 8 includes the apparatus of example 7 wherein the third thickness is less than two monolayers thick.

[0071] Example 9 includes the apparatus of example 4 wherein the member of the layer is included in a projection that projects from the layer into at least one of the first and second oxide layers.

[0072] Example 10 includes the apparatus of example 4 wherein: the member of the layer is selected from the group consisting of ruthenium, tungsten, or molybdenum; and the second contact layer includes tantalum.

[0073] Example 11 includes the apparatus of example 4 wherein the additional magnetic layer is a composite layer including alternating layers that respectively include cobalt and platinum.

[0074] Example 12 includes the apparatus of example 4 wherein the first oxide layer includes more oxygen atomic mass than the second oxide layer.

[0075] Another version of example 12 includes the apparatus of example 4 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.

[0076] Example 13 includes the apparatus of example 4 wherein (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer includes a chemical composition with a higher percentage of boron than a chemical composition of the second layer.

[0077] Example 14 includes the apparatus of example 4 wherein: (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer.

[0078] Example 15 includes the apparatus of example 4 wherein the free magnetic layer is not a composite layer and includes a single layer. [0079] Example 16 includes the apparatus of example 4 wherein: the tunnel barrier layer includes MgO; the free magnetic layer and the additional magnetic layer each include cobalt and iron.

[0080] Example 17 includes the apparatus of example 1, wherein the MTJ has perpendicular anisotropy.

[0081] Example 18 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any one of examples 1 to 17.

[0082] Example 19 includes a method comprising: forming a first contact layer; forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; forming a first oxide layer directly contacting the free magnetic layer; forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof; forming a second oxide layer on the layer; forming a second contact layer on the second oxide layer.

[0083] Another version of Example 19 includes a method comprising: forming a first contact layer; forming a magnetic tunnel junction (MTJ) on the first contact layer, the MTJ including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; forming a first oxide layer directly contacting the free magnetic layer; forming a layer directly contacting the first oxide layer, the layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof; forming a second oxide layer directly contacting the layer; and forming a second contact layer on the second oxide layer.

[0084] Example 20 includes the method of example 19 comprising forming an additional magnetic layer directly contacting the second oxide layer.

[0085] Example 21 includes the method of example 19, wherein forming the layer includes forming a single monolayer of the member with no additional layer of the member above the single monolayer. [0086] Example 22 includes a system comprising: a processor; and a memory, coupled to the processor, comprising: a first contact; a magnetic tunnel junction (MTJ), on the first contact, including a free magnetic layer, a fixed magnetic layer, and a tunnel barrier layer between the free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, or combinations thereof; a first oxide layer which (a)(i) is between the layer and the MTJ, and (a)(ii) directly contacts both the free magnetic layer and the layer; a second contact; and a second oxide layer which (b)(i) is between the layer and the second contact, and (b)(ii) directly contacts the layer.

[0087] Another version of example 22 includes a system comprising: a processor; and a memory, coupled to the processor, comprising: a first contact; a magnetic tunnel junction (MTJ), on the first contact, including a tunnel barrier layer between free and fixed magnetic layers; and a layer including a member selected from the group consisting of ruthenium, tungsten, molybdenum, or combinations thereof; a first oxide layer directly contacting both the free magnetic layer and the layer; a second contact; and a second oxide layer (a)(i) between the layer and the second contact, and (a)(ii) directly contacting the layer.

[0088] Example 23 includes the system of example 22 wherein the layer is less than two monolayers thick.

[0089] Example 24 includes the system of example 22 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.

[0090] Example 25 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to example 1.

[0091] Example 26 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any of examples 22 to 25.

[0092] Example 27 includes the apparatus of example 1 comprising a second oxide layer, comprising MgO, which (b)(i) is between the layer and the additional magnetic layer, and (b)(ii) directly contacts the layer.

[0093] Example 28 includes the apparatus according to any of examples 2 to 4 wherein the second contact layer includes a metal that does not include a member selected from the group consisting of ruthenium, rhodium, palladium, silver, osmium, iridium, platinum, gold, mercury, copper, or combinations thereof.

[0094] Example 29 includes the apparatus according to any of examples 3 to 5 wherein: a side of the first oxide layer, which directly contacts the free magnetic layer, is primarily located in a plane; the first oxide layer has a first thickness that is orthogonal to the plane; the second oxide layer has a second thickness; and the layer has a third thickness that is less than the first thickness.

[0095] Example 30 includes the apparatus according to any of examples 3 to 8 and 10 to 17 wherein the member of the layer is included in a projection that projects from the layer into at least one of the first and second oxide layers.

[0096] Example 31 includes the apparatus according to any of examples 2 to 9 and 11 to 17 wherein: the member of the layer is selected from the group consisting of ruthenium, tungsten, or molybdenum; and the second contact layer includes tantalum.

[0097] Example 32 includes the apparatus according to any of examples 2 to 10 and 12 to 17 wherein the additional magnetic layer is a composite layer including alternating layers that respectively include cobalt and platinum.

[0098] Example 33 includes the apparatus according to any of examples 3 to 11 and 13 to 17 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.

[0099] Example 34 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer includes a chemical composition with a higher percentage of boron than a chemical composition of the second layer.

[00100] Example 35 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein: (a) the free magnetic layer is a composite layer including first and second layers, (b) the first layer is between the second layer and the tunnel barrier layer, and (c) the first layer is primarily located in a plane and has a thickness, orthogonal to the plane, that is thicker than the second layer. [00101] Example 36 includes the apparatus according to any of examples 1 to 12 and 16 to 17 wherein the free magnetic layer is not a composite layer and includes a single layer.

[00102] Example 37 includes the apparatus according to any of examples 2 to 15 wherein: the tunnel barrier layer includes MgO; and the free magnetic layer and the additional magnetic layer each include cobalt and iron.

[00103] Example 38 includes the apparatus according to any of examples 1 to 16, wherein the MTJ has perpendicular anisotropy.

[00104] Example 39 includes a perpendicular spin torque transfer memory (STTM) that includes the MTJ, the first oxide layer, and the layer according to any one of examples 1 to 17.

[00105] Example 40 includes the system according to any of examples 22 to 23 wherein the first oxide layer includes a chemical composition with a higher percentage of oxygen than a chemical composition of the second oxide layer.

[00106] The foregoing description of the embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise forms disclosed. This description and the claims following include terms, such as left, right, top, bottom, over, under, upper, lower, first, second, etc. that are used for descriptive purposes only and are not to be construed as limiting. For example, terms designating relative vertical position refer to a situation where a device side (or active surface) of a substrate or integrated circuit is the "top" surface of that substrate; the substrate may actually be in any orientation so that a "top" side of a substrate may be lower than the "bottom" side in a standard terrestrial frame of reference and still fall within the meaning of the term "top." The term "on" as used herein (including in the claims) does not indicate that a first layer "on" a second layer is directly on and in immediate contact with the second layer unless such is specifically stated; there may be a third layer or other structure between the first layer and the second layer on the first layer. The embodiments of a device or article described herein can be manufactured, used, or shipped in a number of positions and orientations. Persons skilled in the relevant art can appreciate that many modifications and variations are possible in light of the above teaching. Persons skilled in the art will recognize various equivalent combinations and substitutions for various components shown in the Figures. It is therefore intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto.