Title:
STACKED CAPACITOR
Document Type and Number:
WIPO Patent Application WO/2018/043397
Kind Code:
A1
Abstract:
A stacked capacitor according to the present invention is provided with: a laminated body in which a plurality of dielectric layers are stacked; a first signal internal electrode led out to a first end face and a second signal internal electrode led out to a second end face, said first and second signal internal electrodes being arranged side by side within the same surface in the laminated body; a grounding internal electrode arranged so as to face the first signal internal electrode and the second signal internal electrode; a first capacitor unit in which a plurality of the first signal internal electrodes and a plurality of the grounding internal electrodes arrayed in the lamination direction are stacked with the dielectric layers interposed therebetween; and a second capacitor unit in which a plurality of the second signal internal electrodes and the plurality of grounding internal electrodes arrayed in the lamination direction are stacked with the dielectric layers interposed therebetween, wherein the first capacitor unit has a smaller capacitance than the second capacitor unit.
Inventors:
NOGI TAKAFUMI (JP)
HATANAKA HIDEFUMI (JP)
HATANAKA HIDEFUMI (JP)
Application Number:
PCT/JP2017/030725
Publication Date:
March 08, 2018
Filing Date:
August 28, 2017
Export Citation:
Assignee:
KYOCERA CORP (JP)
International Classes:
H01G4/38; H01G4/232; H01G4/30
Foreign References:
| JP2015216201A | 2015-12-03 | |||
| JP2000299249A | 2000-10-24 |
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