A STEPS DIMMING CONTROL CIRCUIT AND A METHOD

Technical Field

The present invention relates to a steps dimming control circuit. In addition, the present invention further relates to a method for controlling such steps dimming control circuit.

Background Art

The fluorescent lamps as the commonest illuminating devices are widely used in various fields. To provide conventional illumination is the basic function of the fluorescent lamp, while the luminance of light emitted from the fluorescent lamp might be required to be adjusted, therefore, the fluorescent lamp is demanded to be step dimming controlled. Accordingly, many methods are used for step dimming. A Chinese patent application No. CN101610631A discloses a steps dimming control circuit that performs step dimming with TRIAC and DB3. The TRIAC and DB3 are triggered to work and have a good working state. However, these devices are quite sensitive to temperature, and as the TRIAC and DB3 used in such steps dimming control circuit should work continuously, the heat generated in the working processes thereof cannot be dissipated timely, consequently, they are easily failed and result in unreliable step dimming.

Summary of the Invention In order to solve the technical problems above, the present invention provides a steps dimming control circuit that has a simple structure, a low cost and performs the step dimming merely with capacitors, resistors and transistors. Moreover, reliable step dimming can be realized as the steps dimming control circuit according to the present invention no longer dims with the TRIAC and DB3 in the prior art, and two steps, three steps and more steps dimming can be realized in the concept of the present invention. In addition, the present invention further relates to a method for controlling such steps dimming control circuit.

One object of the present invention is accomplished via a steps dimming control circuit. The steps dimming control circuit comprises a filter/rectifier module configured to output a power supply voltage via a power supply bus, a dimming signal generating module configured to output a dimming signal, and a control module configured to output a dimming power to a load according to the dimming signal, wherein the dimming signal generating module comprises a reset unit configured for system reset, a dimming signal generating unit configured to output the dimming signal to the control module, and a time- lapse unit configured to output a dimming state to the dimming signal generating unit which generates the dimming signal according to the dimming state. According to one solution of the present invention, the load can be simply dimed in multi steps, the circuit is simpler, and the cost is relatively low.

According to a preferred solution of the present invention, the reset unit comprises a first end and a second end, wherein the first end is connected to the power supply bus via a first peripheral circuit, connected to a second end of the time-lapse unit via a second peripheral circuit to output a signal for resetting the time- lapse unit, and connected to a second end of the dimming signal generating unit via a third peripheral circuit, and the second end is connected to a feedback end of the control module via a fourth peripheral circuit to receive a signal of whether to start the reset unit, and connected to a first end of the dimming signal generating unit via a fifth peripheral circuit, wherein, the third peripheral circuit and fifth peripheral circuit are arranged for ensuring that when the reset unit operates, the dimming signal generating unit does not operate and vice versa .

Preferably, the first peripheral circuit comprises a second resistor connected between the first end of the reset unit and the power supply bus, the second peripheral circuit comprises a fifteenth diode connected between the first end of the reset unit and the second end of the time-lapse unit, the third peripheral circuit comprises a third resistor and a fifth diode in series connection between the first end of the reset unit and the second end of the dimming signal generating unit, the fourth peripheral circuit comprises a sixth resistor connected between the first end of the reset unit and the feedback end of the control module, and the fifth peripheral circuit comprises a sixth diode connected between the second end of the reset unit and the first end of the dimming signal generating unit, wherein conduction directions of the fifth diode and the sixth diode are opposite. The reset unit and the dimming signal generating unit do not work at one time since the conduction directions of the fifth diode and the sixth diode are opposite. According to a preferred solution of the present invention, the dimming signal generating unit comprises a first end and a second end, wherein the first end is connected to the second end of the time-lapse unit via a sixth peripheral circuit to receive the dimming state recorded by the time-lapse unit, connected to the power supply bus via a seventh peripheral circuit, connected to a dimming signal receiving end of the control module via an eighth peripheral circuit to output the dimming signal to the control module, and the second end is connected to a first end of the time-lapse unit via a ninth peripheral circuit to output the dimming signal to the time- lapse unit. Advantageously, when power-off duration is shorter than a predetermined delay time of the time- lapse unit, the control module is not triggered due to restriction of the time- lapse unit, when the dimming signal generating unit continuously outputs the dimming signal according to the dimming state recorded by the time- lapse unit after a delayed start thereof is completed, the time- lapse unit removes a triggering restriction to the control module, thus the control module outputs the dimming power according to the dimming signal. The time-lapse unit merely records the current dimming state continuously when the dimming signal generating unit outputs the dimming signal continuously.

Preferably, the sixth peripheral circuit comprises a seventh diode connected between the first end of the dimming signal generating unit and the second end of the time- lapse unit, the seventh peripheral circuit comprises a seventh resistor connected between the first end of the dimming signal generating unit and the power supply bus, the eighth peripheral circuit comprises a twelfth resistor, an eleventh resistor and a thirteenth resistor in series connection between the first end of the dimming signal generating unit and the dimming signal receiving end of the control module, and the ninth peripheral circuit comprises a seventh resistor, an eighteenth resistor and a nineteenth resistor in series connection between the second end of the dimming signal generating unit and the first end of the time-lapse unit.

According to a preferred solution of the present invention, the time-lapse unit comprises a first end and the second end, wherein the first end is connected to the second end of the dimming signal generating unit via the ninth peripheral circuit to receive the dimming signal, and connected to a restriction signal receiving end of the control module via a tenth peripheral circuit to output a signal of restricting triggering of the control module to the control module, and the second end is connected to the first end of the reset unit via the second peripheral circuit to receive a signal for resetting the time-lapse unit, connected to the first end of the dimming signal generating unit via the sixth peripheral circuit, and connected to a feedback end of the control module via an eleventh peripheral circuit to receive a driving voltage, wherein the eleventh peripheral circuit comprises a fifteenth resistor connected between the second end of the time- lapse unit and the feedback end of the control module. In one solution of the present invention, the reset unit may reset the time-lapse unit in power-on for the first time or after completing one dimming cycle, and the time- lapse unit feeds back an initial state after the reset to the dimming signal generating unit to cause it to output a dimming signal corresponding to the initial state. When the duration of power-off is short, i.e., the power-off duration does not exceed the predetermined delay time of the time- lapse unit, the time- lapse unit feeds back the dimming state it records before the power-off to the dimming signal generating unit to cause it to output the dimming signal corresponding to the dimming state.

Preferably, the reset unit comprises a first transistor, wherein a base of the first transistor is connected with one base driving circuit for controlling on and off of the first transistor so as to reset the time-lapse unit, and an emitter of the first transistor is connected to ground; the dimming signal generating unit comprises at least one second transistor, wherein a base of the second transistor is connected with one base driving circuit for controlling on and off of the second transistor so as to generate the dimming signal, and an emitter of the second transistor is connected to ground; the time-lapse unit comprises at least one third transistor, wherein a base of the third transistor is connected with one base driving circuit for controlling on and off of the third transistor so as to record the dimming state, and an emitter of the third transistor is connected to ground. In one solution of the present invention, combinations of the on and off states of the transistors can output dimming signals corresponding to different dimming states, while the transistors are enabled and disabled merely by resistors and capacitors, which renders a simpler structure and a low cost of the steps dimming control circuit. Moreover, reliable step dimming can be realized as the steps dimming control circuit according to the present invention no longer dims with the TRIAC and DB3 in the prior art.

Further preferably, a collector of the first transistor of the reset unit is the first end of the reset unit, and an in- termediate connection point between a fifth resistor and a third capacitor is the second end of the reset unit; a collector of the second transistor of the dimming signal generating unit is the first end of the dimming signal generating unit, and an intermediate connection point between the other end of the fifth resistor and the third capacitor is the second end of the dimming signal generating unit; a collector of the third transistor of the time-lapse unit is the first end of the time- lapse unit, and an intermediate connection point between the other end of the fifth resistor and the third capacitor is the second end of the time-lapse unit.

Two steps, three steps or more steps dimming can be realized with the solutions of the present invention. In one solution of two steps dimming, the dimming signal generating unit and the time-lapse unit each have a transistor and a base driving circuit, and in one solution of three steps dimming, the dimming signal generating unit and the time- lapse unit each have two transistors and two base driving circuits, wherein each group composed by one transistor and one base driving circuit is connected to each other, to the dimming signal generating unit and the reset unit via proper peripheral circuits. In the generic concept of the present invention, the number of the group composed by the transistor and the base driving circuit may be increased to obtain possibilities of different combinations of on and off states of the transistors for multi-step dimming.

The other object of the present invention is accomplished via a method for controlling the steps dimming control circuit above. The method includes steps of: a) switching on power supply; b) starting the steps dimming control circuit, the reset unit resetting a time-lapse unit that records an initial state, a dimming signal generating unit outputting a dimming signal corresponding the initial state, and a control module outputting a dimming power according to the dimming signal; c) switching off power supply and switching on the power supply again, determining whether a duration from power-off to power-on again exceeds a predetermined delay time of the time-lapse unit, if yes, returning to step b) , and if not, carrying out step d) ; d) the dimming signal generating unit outputting a dimming signal corresponding a dimming state next to a dimming state before the power-off according to the dimming state recorded by the time- lapse unit before the power-off, the time-lapse unit recording the next- step dimming state, and the control module outputting the dimming power according to the dimming signal; and e) switching off power supply and switching on the power supply again, determining whether a duration from power-off to power-on again exceeds the predetermined delay time of the time- lapse unit, if yes, returning to step b) , and if not, determining whether one dimming cycle is completed: if yes, returning to step b) , and if not, returning to step d) .

Preferably in step b) , a process of starting the steps dimming control circuit is as follow: firstly, the reset unit, the dimming signal generating unit andthe time- lapse unit are not started, while the control module is started, after the control module is started, the reset unit and the time-lapse unit are then started, the reset unit resets the time-lapse unit so that the time-lapse unit records the initial state, the dimming signal generating unit outputs the dimming signal corresponding to the initial state after a delayed start thereof is completed, and the control module outputs the dim- ming power according to the dimming signal .

Further preferably in step d) , the dimming signal generating unit outputting the dimming signal is in a way as follow: the time- lapse unit records the dimming state before the power- off, and restricts triggering of the control module, the dimming signal generating unit outputs a dimming signal corresponding a dimming state next to the dimming state before the power-off, according to the dimming state recorded by the time-lapse unit before the power-off, after a delayed start thereof is completed, so as to remove a triggering restriction to the control module and output the dimming signal to the control module, and the control module outputs the dimming power according to the dimming signal .

Brief Description of the Drawings

The accompanying drawings constitute a part of the present Description and are used to provide further understanding of the present invention. Such accompanying drawings illustrate the embodiments of the present invention and are used to describe the principles of the present invention together with the Description. In the accompanying drawings the same components are represented by the same reference numbers. As shown in the drawings :

Fig. 1 is a schematic block diagram of a steps dimming control circuit according to the present invention;

Fig. 2 is a circuit diagram of a first embodiment of a steps dimming control circuit according to the present invention;

Fig. 3 is a circuit diagram of a second embodiment of a steps dimming control circuit according to the present invention; and

Fig. 4 is a time sequence diagram of a method for controlling a steps dimming control circuit according to the present invention .

Detailed Description of the Embodiments

Fig. 1 is a schematic block diagram of a steps dimming control circuit according to the present invention. As can be seen from Fig. 1, the steps dimming control circuit comprises: a filter/rectifier module 1 configured as a power supply module and outputting a power supply voltage VCC via a power supply bus V _buS/ a dimming signal generating module 2 configured to output a dimming signal, and a control module 3 configured to output a dimming power according to the dimming signal .

It further can be seen from Fig. 1 that the dimming signal generating module 2 comprises: a reset unit Ul configured for system reset, a dimming signal generating unit U2 configured to output the dimming signal to the control module 3, and a time- lapse unit U3 configured to output a dimming state recorded to the dimming signal generating unit U2 which outputs the dimming signal according to the dimming state recorded, wherein a first end REi of the reset unit Ul is connected to the power supply bus V _bus via a first peripheral circuit, connected to a second end LAP ₂ of the time- lapse unit U3 via a second peripheral circuit to output a signal for resetting the time- lapse unit U3 , and connected to a second end DIM ₂ of the dimming signal generating unit U2 via a third peripheral circuit; and a second end RE ₂ of the reset unit Ul is connected to a feedback end CRL _fb of the control module 3 via a fourth peripheral circuit to receive a signal of whether to start the reset unit Ul , and connected to a first end DIMi of the dimming signal generating unit U2 via a fifth peripheral circuit .

The first end DIMi of the dimming signal generating unit U2 is connected to the second end LAP ₂ of the time- lapse unit U3 via a sixth peripheral circuit to receive the dimming state recorded by the time-lapse unit U3 , connected to the power supply bus V _bus via a seventh peripheral circuit, and connected to a dimming signal receiving end CRLim of the control module 3 via an eighth peripheral circuit to output the dimming signal to the control module 3. The second end DIM ₂ of the dimming signal generating unit U2 is connected to the first end LAPi of the time-lapse unit U3 via a ninth peripheral circuit to output the dimming signal to the time-lapse unit U3. Besides, the first end LAPi of the time-lapse unit U3 is further connected to a restriction signal receiving end CRLi _n2 of the control module 3 via a tenth peripheral circuit to output a signal of restricting triggering thereof to the control module 3, and connected to a feedback end CRLfb of the control module 3 via an eleventh peripheral circuit.

Fig. 2 is a circuit diagram of a first embodiment of a steps dimming control circuit according to the present invention. The steps dimming control circuit according to the first embodiment can realize two steps dimming. As can be seen from Fig. 2, the reset unit Ul comprises a first transistor Ql, wherein a base of the first transistor Ql is connected with one base driving circuit for controlling on and off of the first transistor Ql so as to reset the time-lapse unit U3 , and an emitter of the first transistor Ql is connected to ground; the dimming signal generating unit U2 comprises a second transistor Q2 , wherein a base of the second transistor Q2 is connected with one base driving circuit for controlling on and off of the second transistor Q2 so as to generate the dimming signal, and an emitter of the second transistor Q2 is connected to ground; and the time-lapse unit U3 comprises a third transistor Q3 , wherein a base of the third transistor Q3 is connected with one base driving circuit for controlling on and off of the third transistor Q3 so as to record the dimming state, and an emitter of the third transistor Q3 is connected to ground. In one solution of the present invention, the base driving circuit of the reset unit Ul comprises a fourth resistor R4 , a fifth resistor R5 and a third capacitor C3 , wherein the base of the first transistor Ql is connected with one end of the fifth resistor R5 , the other end of the fifth resistor R5 is connected to one end of the third capacitor C3 , the other end of the capacitor C3 is connected to ground, one end of the fourth resistor R4 is connected with an intermediate connection point between the base of the first transistor Ql and the one end of the fifth resistor R5 , and the other end of the fourth resistor R4 is connected to ground. The base driving circuits of the dimming signal generating unit U2 and the time-lapse unit U3 have the same connection structure as the base driving circuit of the reset unit Ul and repeated descriptions will not be given herein, and the difference merely lies in that third capacitors C3 ' ' and C3 ' ' ' ' of the time- lapse unit U3 are configured to be polar capacitors.

In the embodiment shown in Fig. 2, the first end RE _± of the reset unit Ul is connected to the power supply bus V _bus via a second resistor R2 of the first peripheral circuit so as to obtain the driving voltage from the power supply bus V _bus , connected to the second end LAP ₂ of the time- lapse unit U3 via a fifteenth diode D15 of the second peripheral circuit, connected to the second end DIM ₂ of the dimming signal generating unit U2 via a third resistor R3 and a fifth diode D5 in series connection of the third peripheral circuit, and connected to the feedback end CRL _fb of the control module 3 via a sixth resistor R6 of the fourth peripheral circuit to obtain the signal of whether to reset the time- lapse unit U3 from the control module 3. Besides, the second end RE ₂ of the reset unit Ul is connected to the first end DIMi of the dimming signal generating unit U2 via a sixth diode D6 of the fifth peripheral circuit, wherein conduction directions of the fifth diode D5 and the sixth diode D6 are opposite so that the reset unit Ul and the dimming signal generating unit U2 do not work at one time.

As further can be seen from Fig. 2, the first end DIMi of the dimming signal generating unit U2 is connected to the second end LAP ₂ of the time- lapse unit U3 via a seventh diode D7 of the sixth peripheral circuit, connected to the power supply bus V _bus via a seventh resistor R7 of the seventh peripheral circuit, and connected to the dimming signal receiving end CRLi _n i of the control module 3 via a twelfth resistor, a eleventh resistor Rll and a thirteenth resistor R13 in series connection of the eighth peripheral circuit. Besides, the second end DIM ₂ of the dimming signal generating unit U2 is connected to the first end LAPi of the time- lapse unit U3 via a seventh resistor R7 , a eighteenth resistor R18 and a nineteenth resistor R19 in series connection of the ninth periph- eral circuit. Finally, the first end LAP _± of the time-lapse unit U3 is connected to the restriction signal receiving end CRLi _n2 of the control module 3 via a tenth peripheral circuit, and the second end LAP2 of the time- lapse unit U3 is connected to the feedback end CRL _fb of the control module 3 via a fifteenth resistor R15, R15' of the eleventh peripheral circuit to receive a driving voltage.

Fig. 3 is a circuit diagram of a second embodiment of a steps dimming control circuit according to the present invention. The steps dimming control circuit according to the second embodiment can realize three steps dimming. The three steps dimming control circuit in Fig. 3 is different from the two steps dimming control circuit in Fig. 2 in the dimming signal generating unit U2 and the time-lapse unit U3. In the first embodiment shown in Fig. 2, the dimming signal generating unit U2 and the time- lapse unit U3 each have one group composed by one transistor and one base driving circuit, while in the second embodiment shown in Fig. 3, the dimming signal generating unit U2 and the time- lapse unit U3 each have two groups composed by one transistor and one base driving circuit, accordingly, possibilities of combinations on and off of the transistors are increased so as to realize the three steps dimming. In the concept of the present invention, it is not limited to two steps dimming or three steps dimming, while more steps dimming, such as four steps dimming, five steps dimming, can be realized by increasing the number of the group composed by one transistor and one base driving circuit in the dimming signal generating unit U2 and the time-lapse unit U3. Besides, in the second embodiment shown in Fig. 3, units in the second embodiment can be connected in the principle of the peripheral circuits in the first embodi- ment shown in Fig. 1, and repeated descriptions will not be given herein.

Fig. 4 is a time sequence diagram of a method for controlling a steps dimming control circuit according to the present invention. In this controlling method, firstly in step a) a power supply is switched on, and then in step b) the reset unit Ul , the dimming signal generating unit U2 and the time- lapse unit U3 are not started, while the control module 3 is started; after the control module 3 is started, the reset unit Ul and the time- lapse unit U3 are then started, the reset unit Ul resets the time-lapse unit U3 so that the time- lapse unit U3 records an initial state, the dimming signal generating unit U2 outputs a dimming signal corresponding to the initial state after a delayed start thereof is completed, and the control module 3 outputs a dimming power according to the dimming signal to enable a load 4 to work in the initial state. In step c) , when the power supply is switched off and switched on again, it is determined whether it is power-on for the first time or whether a duration from last power-off to the power-on exceeds a predetermined delay time of the time-lapse unit U3 , if yes, return to step b) , and if not, the time- lapse unit U3 records the dimming state before the power-off in step d) , and restricts triggering of the control module 3, the dimming signal generating unit U2 outputs a dimming signal corresponding a dimming state next to the dimming state before the power-off to the time-lapse unit U3 according to the dimming state before the power-off recorded by the time-lapse unit U3 after a delayed start thereof is completed, to remove a triggering restriction to the control module 3, and outputs the dimming signal to the control module 3, and the control module 3 outputs the dimming power ac- cording to the dimming signal, so that one dimming process is accomplished. When further dimming is required, step e) will be carried out, the power supply is switched off and again switched on and determine whether a duration from power-off to power-on again exceeds the predetermined delay time of the time-lapse unit U3 , if yes, return to step b) , and if not, determine whether one dimming cycle is completed: if yes, return to step b) , and if not, return to step d) .

Take the second embodiment of the steps dimming control circuit of the present invention as an example. This steps dimming control circuit can realize three steps dimming. The on and off states of the transistors in each dimming step are as follow: in a first step, transistors Ql and Q3 are enabled, while transistors Q2 , Q2 ' and Q3 ' are disabled, at which time an output voltage VI is obtained; in a second step, transistors Q2 and Q3 ' are enabled, while transistors Ql, Q2 ' and Q3 are disabled, at which time an output voltage V2 is obtained; and in a third step, transistor Q2 ' is enabled, while transistors Ql, Q2 , Q3 and Q3 ' are disabled, at which time an output voltage V3 is obtained, wherein customers may set the output voltages to be V1>V2>V3 according to different dimming purposes, and consequently, the three steps dimming is realized .

The above is merely preferred embodiments of the present invention but not to limit the present invention. For the person skilled in the art, the present invention may have various alterations and changes. Any alterations, equivalent substitutions, improvements, within the spirit and principle of the present invention, should be covered in the protection scope of the present invention. List of reference signs

1 filter/rectifier module

2 dimming signal generating module

3 control module

4 load

Ul reset unit

U2 dimming signal generating unit

U3 time-lapse unit

V _bus power supply bus

VCC power supply voltage

REi first end of the reset unit

RE ₂ second end of the reset unit

DIMi first end of the dimming signal generating unit

DIM ₂ second end of the dimming signal generating unitLAP _! first end of the time-lapse unit

LAP ₂ second end of the time- lapse unit

Ql first transistor Q2 , Q2 ' second transistor

Q3 , Q3 ' third transistor

R2 second resistor

R3 third resistor

R4, R4', R4' ^# , R4''', R4 ' ' ' ' fourth resistor

R5, R5', R5'', R5''', R5 ' ' ' ' fifth resistor

R6 sixth resistor

R7 , R7 ' seventh resistor

Rll, Rll' eleventh resistor

R12, R12' twelfth resistor

R13 thirteenth resistor

R15, R15' fifteenth resistor

R18 eighteenth resistor

R19 nineteenth resistor

D5, D5' fifth diode

D6, D6' sixth diode

D7 , D7 ' seventh diode D15 fifteenth diode

C3 , C3 ' , C3 " , C3 " ' , C3 " " third capacitor

CRL _fb feedback end of the control module

CRLi _n i dimming signal receiving end of the control module

CRLi _n2 restriction signal receiving end of the control module