Title:
STORAGE SYSTEM, NODE DEVICE, METHOD FOR CONTROLLING CACHE, AND PROGRAM
Document Type and Number:
WIPO Patent Application WO/2015/046552
Kind Code:
A1
Abstract:
The present invention is a system in which a plurality of nodes share storage and have caches corresponding to the storage, wherein the quantity of data to be invalidated in order to maintain consistency is reduced and suppression of reduction in capability is enabled. The plurality of nodes are individually provided with a cache for temporarily holding data related to the storage shared by the plurality of nodes, and a record is made of time information regarding when a process for accessing data is migrated from a first node among the plurality of nodes to another node, and in the first node, after the process has been migrated to the other node, among the data retained in the cache of the first node, data for which the time last accessed by the process on the first node, before the migration of the process to the other node, is older than the time the process was migrated from the first node to the other node, is selectively invalidated.
Inventors:
OGAWA SHUGO (JP)
Application Number:
PCT/JP2014/075990
Publication Date:
April 02, 2015
Filing Date:
September 30, 2014
Export Citation:
Assignee:
NEC CORP (JP)
International Classes:
G06F12/08; G06F12/00; G06F12/0808; G06F12/0813; G06F12/0815; G06F12/0891; G06F12/0893; G06F15/167
Foreign References:
| US6601144B1 | 2003-07-29 | |||
| JPH01197858A | 1989-08-09 |
Other References:
XIN YUAN ET AL.: "A Timestamp -based Selective Invalidation Scheme for Multiprocessor Cache Coherence", PROCEEDINGS OF THE 1996 INTERNATIONAL CONFERENCE ON PARALLEL PROCESSING, vol. 3, pages 114 - 121
Attorney, Agent or Firm:
KATO, Asamichi (JP)
Asamichi Kato (JP)
Asamichi Kato (JP)
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