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Patent Searching and Data


Title:
STRUCTURE HAVING CHIP MOUNTED THEREON AND MODULE PROVIDED WITH THE STRUCTURE
Document Type and Number:
WIPO Patent Application WO/2010/134181
Kind Code:
A1
Abstract:
A structure having a chip mounted thereon is composed of a substrate having a base, a first chip arranged on the upper surface of the base, and an adhesive for bonding the first chip onto the base.  The base has the adhesive on the upper surface thereof.  The first chip is formed in a rectangular shape, with a width and a length, and the lower surface of the first chip is bonded onto the base by using the adhesive.  The adhesive is composed of only a first adhesive, a second adhesive and a third adhesive, which are arranged only at three spots on the upper surface of the base, and the three spots on the upper surface of the base are arranged at apexes of a triangle.  The first chip is bonded onto the base only by using the first adhesive, the second adhesive and the third adhesive.

Inventors:
HAYASHI SHINTAROU (JP)
UEDA MITSUHIKO (JP)
SANAGAWA YOSHIHARU (JP)
SAKAI TAKAMASA (JP)
Application Number:
PCT/JP2009/059347
Publication Date:
November 25, 2010
Filing Date:
May 21, 2009
Export Citation:
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Assignee:
PANASONIC ELEC WORKS CO LTD (JP)
HAYASHI SHINTAROU (JP)
UEDA MITSUHIKO (JP)
SANAGAWA YOSHIHARU (JP)
SAKAI TAKAMASA (JP)
International Classes:
G01P15/12; G01P15/08; G01P15/18; H01L29/84; H01L21/60
Foreign References:
JP2006023190A2006-01-26
JP2007322160A2007-12-13
JP2008053350A2008-03-06
JP2006300905A2006-11-02
JP2003344439A2003-12-03
JP2006133123A2006-05-25
Other References:
See also references of EP 2434297A4
Attorney, Agent or Firm:
NISHIKAWA, Yoshikiyo et al. (JP)
Yoshikiyo Nishikawa (JP)
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Claims: