Title:
STRUCTURE FOR HOLDING FINE STRUCTURE, SEMICONDUCTOR DEVICE, TFT DRIVING CIRCUIT, PANEL, DISPLAY, SENSOR AND THEIR MANUFACTURING METHODS
Document Type and Number:
WIPO Patent Application WO/2006/085559
Kind Code:
A1
Abstract:
Disclosed is a method for arranging fine structures such as carbon nanotubes and semiconductor nanowires on a substrate. Also disclosed is a substrate having fine structures arranged thereon by such a method. Specifically disclosed is a method for arranging fine structures on a substrate which comprises a step for forming a groove (2) in a substrate (1); a step for dropping a solution (6), wherein fine structures (3) are dispersed, in the groove; and a step for arranging the fine structures in the groove in a self-organizing manner by evaporating the solution. A substrate on which fine structures are arranged by such a method can be used for field effect transistors and sensors.
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Inventors:
KAWASHIMA TAKAHIRO
SAITOH TOHRU
MINO NORIHISA
SAITOH TOHRU
MINO NORIHISA
Application Number:
PCT/JP2006/302180
Publication Date:
August 17, 2006
Filing Date:
February 08, 2006
Export Citation:
Assignee:
MATSUSHITA ELECTRIC IND CO LTD (JP)
KAWASHIMA TAKAHIRO
SAITOH TOHRU
MINO NORIHISA
KAWASHIMA TAKAHIRO
SAITOH TOHRU
MINO NORIHISA
International Classes:
B82B1/00; B82B3/00; G09F9/30; H01L21/336; H01L29/06; H01L29/786
Domestic Patent References:
| WO2002063693A1 | 2002-08-15 |
Foreign References:
| JP2004071654A | 2004-03-04 | |||
| JP2004098246A | 2004-04-02 | |||
| JP2004122283A | 2004-04-22 | |||
| JP2005125428A | 2005-05-19 | |||
| JP2005169614A | 2005-06-30 | |||
| JP2005271198A | 2005-10-06 |
Attorney, Agent or Firm:
Maeda, Hiroshi (5-7 Hommachi 2-chome, Chuo-ku, Osaka-sh, Osaka 53, JP)
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