Title:
STT-MRAM FAILED ADDRESS BYPASS CIRCUIT AND STT-MRAM DEVICE INCLUDING SAME
Document Type and Number:
WIPO Patent Application WO/2018/169335
Kind Code:
A1
Abstract:
An STT-MRAM device according to the present embodiment comprises: a spin transfer torque magnetic random access memory (STT-MRAM) memory array which includes a data storage unit for storing data, a failed area address storage unit for storing an address of a failed area, and a spare area for storing data of a failed area; and a bypass determination unit which includes a volatile information storage element for storing the address of the failed area, stored in the failed area address storage unit and provided thereto, and when memory array access occurs, compares an access address with the address of the failed area stored in the volatile information storage element and causes the memory array access to bypass to the spare area.
Inventors:
PARK SANG-GYU (KR)
LEE DONG-GI (KR)
LEE DONG-GI (KR)
Application Number:
PCT/KR2018/003067
Publication Date:
September 20, 2018
Filing Date:
March 16, 2018
Export Citation:
Assignee:
UNIV HANYANG IND UNIV COOP FOUND (KR)
International Classes:
G11C29/00; G06F11/10; G11C11/16
Foreign References:
| KR20150057155A | 2015-05-28 | |||
| KR20140131207A | 2014-11-12 | |||
| KR100888847B1 | 2009-03-17 | |||
| KR20120053953A | 2012-05-29 | |||
| KR20160024472A | 2016-03-07 |
Attorney, Agent or Firm:
ISIS IP LAW LLC (KR)
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