SUBSTRATE FOR MOUNTING ELECTRONIC PART AND PROCESS FOR MANUFACTURING THE SAME

Title:

SUBSTRATE FOR MOUNTING ELECTRONIC PART AND PROCESS FOR MANUFACTURING THE SAME

Document Type and Number:

WIPO Patent Application WO/1997/024021

Kind Code:

A1

Abstract:

A plurality of side-face patterns (11 and 23) are formed on the wall surface of an opening (2) for mounting an electronic part, and projecting sections (21) are protruded inward from the wall surface of the opening (2). The end sections of the patterns (11 and 12) are extended to the side faces of the projecting section (21). The patterns (11 and 12) are formed by etching the side-face pattern nonforming part of the conductor layer formed on the entire wall surface of the opening (2), with the side face pattern forming part of the conductor layer covered with a resist film for side face pattern. Therefore, separation of the side-face patterns is prevented and, at the same time, a plurality of side-face patterns to which different potentials are given are formed easily.

Inventors:

ISHIDA NAOTO (JP)
HAYASHI TERUO (JP)
TSUKADA KIYOTAKA (JP)

Application Number:

PCT/JP1996/003672

Publication Date:

July 03, 1997

Filing Date:

December 16, 1996

Export Citation:

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Assignee:

IBIDEN CO LTD (JP)
ISHIDA NAOTO (JP)
HAYASHI TERUO (JP)
TSUKADA KIYOTAKA (JP)

International Classes:

H05K1/18; H01L21/48; H01L23/055; H01L23/12; H01L23/498; H01L23/50; H05K3/46; (IPC1-7): H05K1/11; H05K1/18; H05K3/06

Foreign References:

JPH02232986A	1990-09-14
JPS5626487A	1981-03-14
JPH06188534A	1994-07-08

Other References: