CONFIGURATION

CROSS - REFERENCE TO RELATED APPLICATIONS

[0001] This application claims the benefit of and priority to U.S. Provisional Application No. 62/776,663, filed December 07, 2018, entitled“SUPPORT OF LIMITED- FUNCTIONALITY DOCSIS FDX IN A NON-“N+0” CONFIGURATION”, contents of which are herein incorporated by reference in their entirety.

FIELD

[0002] The present disclosure relates to data over cable service interface specification (DOCSIS) systems, and in particular, to a system and method to support limited- functionality DOCSIS full duplex (FDX) in a non-“N+0” configuration.

BACKGROUND

[0003] DOCSIS 3.1 FDX (Full Duplex) enables cable network operators to increase upstream data rates and balance between downstream (“forward path”) and upstream (“return path”) capacity. This is achieved by utilizing the same range of frequencies (FDX frequency range) for both upstream and downstream. Existing technologies mostly use either Frequency Division Duplexing (FDD) or Time Division Duplexing (TDD). In FDD, upstream and downstream (or uplink and downlink in the terms of the wireless world) traffic operate separately in dedicated parts of the spectrum. In current DOCSIS network deployments, the lower part of the spectrum is dedicated for upstream traffic and the upper part of the spectrum is dedicated for downstream traffic. In TDD, the upstream and downstream traffic share the same spectrum, but take turns in using the spectrum, similar to how Wi-Fi, or DSL, operate. In Full Duplex communication, the upstream and downstream traffic use the same spectrum at the same time, doubling the efficiency of spectrum use. BRIEF DESCRIPTION OF THE DRAWINGS

[0004] Some examples of circuits, apparatuses and/or methods will be described in the following by way of example only. In this context, reference will be made to the accompanying Figures.

[0005] Fig. 1 depicts a simplified block diagram of a wireline communication system that supports limited-functionality full duplex (FDX) communications, according to one embodiment of the disclosure.

[0006] Fig. 2 depicts an exemplary block diagram of a wireline communication system that supports limited-functionality full duplex (FDX) communications, according to one embodiment of the disclosure.

[0007] Fig. 3a illustrates an example implementation of a full duplex (FDX) trunk amplifier circuit, according to one embodiment of the disclosure.

[0008] Fig. 3b shows an example embodiment of the frequency response of the first diplexer circuit in Fig. 3a.

[0009] Fig. 3c shows an example embodiment of the frequency response of the second diplexer circuit in Fig. 3a.

[0010] Fig. 4 illustrates an example implementation of a full duplex (FDX) trunk amplifier circuit, according to one embodiment of the disclosure.

[0011] Fig. 5 illustrates an example implementation of a wireline communication network that enables limited functionality full duplex (FDX) communications, according to one embodiment of the disclosure.

[0012] Fig. 6 illustrates a flow chart of a method for a full duplex (FDX) trunk amplifier circuit, according to one embodiment of the disclosure.

[0013] Fig. 7 illustrates a flow chart of a method for a remote PHY (RPHY) circuit, according to one embodiment of the disclosure. DETAILED DESCRIPTION

[0014] In one embodiment of the disclosure, a full duplex (FDX) trunk amplifier circuit configured to be coupled between a remote PHY (RPHY) circuit and one or more cable modems (CMs) associated with a wireline communication system is disclosed. The FDX trunk amplifier circuit comprises a trunk amplifier circuit comprising an amplifier circuit. In some embodiments, the amplifier circuit is configured to convey a

downstream transmission of a downstream data signal associated with the RPHY circuit in a FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs in the FDX frequency band, based on a filter control signal associated with the RPHY circuit. In some embodiments, the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band are conveyed at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0015] In one embodiment of the disclosure, a remote PHY (RPHY) circuit configured to interface with an FDX trunk amplifier circuit is disclosed. In some embodiments, the RPHY circuit comprises a control signal driver circuit configured to provide a filter control signal to the FDX trunk amplifier circuit. In some embodiments, the filter control signal is configured to configure the FDX trunk amplifier circuit to enable a downstream transmission of a downstream data signal associated with the RPHY circuit to the one or more CMs in a FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band, at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap. In some embodiments, a predefined parameter associated with the filter control signal is indicative of a configuration associated with the FDX trunk amplifier circuit.

[0016] In one embodiment of the disclosure, a full duplex (FDX) amplifier network circuit is disclosed. In some embodiments, the FDX amplifier network circuit comprises one or more branches configured to couple to a remote PHY (RPHY) circuit, each branch comprising one or more FDX trunk amplifier circuits coupled to one another. In some embodiments, each of the FDX trunk amplifier circuit comprises a trunk amplifier circuit comprising an amplifier circuit. In some embodiments, the amplifier circuit is configured to convey a downstream transmission of a downstream data signal associated with the RPHY circuit in a FDX frequency band and an upstream

transmission of an upstream data signal associated with the one or more CMs in the FDX frequency band, based on a filter control signal associated with the RPHY circuit.

In some embodiments, the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band are conveyed at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0017] The present disclosure will now be described with reference to the attached drawing figures, wherein like reference numerals are used to refer to like elements throughout, and wherein the illustrated structures and devices are not necessarily drawn to scale. As utilized herein, terms“component,”“system,”“interface,”“circuit ” and the like are intended to refer to a computer-related entity, hardware, software (e.g., in execution), and/or firmware. For example, a component can be a processor (e.g., a microprocessor, a controller, or other processing device), a process running on a processor, a controller, an object, an executable, a program, a storage device, a computer, a tablet PC and/or a user equipment (e.g., mobile phone, etc.) with a processing device. By way of illustration, an application running on a server and the server can also be a component. One or more components can reside within a process, and a component can be localized on one computer and/or distributed between two or more computers. A set of elements or a set of other components can be described herein, in which the term“set” can be interpreted as“one or more.”

[0018] Further, these components can execute from various computer readable storage media having various data structures stored thereon such as with a module, for example. The components can communicate via local and/or remote processes such as in accordance with a signal having one or more data packets (e.g., data from one component interacting with another component in a local system, distributed system, and/or across a network, such as, the Internet, a local area network, a wide area network, or similar network with other systems via the signal).

[0019] As another example, a component can be an apparatus with specific functionality provided by mechanical parts operated by electric or electronic circuitry, in which the electric or electronic circuitry can be operated by a software application or a firmware application executed by one or more processors. The one or more processors can be internal or external to the apparatus and can execute at least a part of the software or firmware application. As yet another example, a component can be an apparatus that provides specific functionality through electronic components without mechanical parts; the electronic components can include one or more processors therein to execute software and/or firmware that confer(s), at least in part, the functionality of the electronic components.

[0020] Use of the word exemplary is intended to present concepts in a concrete fashion. As used in this application, the term“or” is intended to mean an inclusive“or” rather than an exclusive“or”. That is, unless specified otherwise, or clear from conte8, “X employs A or B” is intended to mean any of the natural inclusive permutations. That is, if X employs A; X employs B; or X employs both A and B, then“X employs A or B” is satisfied under any of the foregoing instances. In addition, the articles“a” and“an” as used in this application and the appended claims should generally be construed to mean“one or more” unless specified otherwise or clear from conte8 to be directed to a singular form. Furthermore, to the event that the terms "including", "includes", "having", "has", "with", or variants thereof are used in either the detailed description and the claims, such terms are intended to be inclusive in a manner similar to the term

"comprising."

[0021] The following detailed description refers to the accompanying drawings. The same reference numbers may be used in different drawings to identify the same or similar elements. In the following description, for purposes of explanation and not limitation, specific details are set forth such as particular structures, architectures, interfaces, techniques, etc. in order to provide a thorough understanding of the various aspects of various embodiments. However, it will be apparent to those skilled in the art having the benefit of the present disclosure that the various aspects of the various embodiments may be practiced in other examples that depart from these specific details. In certain instances, descriptions of well-known devices, circuits, and methods are omitted so as not to obscure the description of the various embodiments with unnecessary detail.

[0022] As indicated above, DOCSIS 3.1 FDX (Full Duplex) enables cable network operators to increase upstream data rates and balance between downstream (“forward path”) and upstream (“return path”) capacity, by utilizing the same range of frequencies (FDX frequency range) for both upstream and downstream. In some embodiments, the range of frequencies within the FDX frequency band is from 108 MHz - 684 MHz. However, in other embodiments, the range of frequencies within the FDX band may vary. Traditionally, the cable plant (the part of the hybrid fiber coaxial (HFC) network that uses coaxial cabling as infrastructure) use trunk amplifiers to boost the signal between the cable modem termination system (CMTS) and the cable modems (CMs). The trunk amplifier is a standalone module that connects to coaxial cables in both directions and receives power supply. The trunk amplifiers (e.g., CATV trunk amplifiers/field amplifiers) have a diplex filter to separate upstream from downstream and amplifiers for each direction. In some embodiments, the diplexer filter in the trunk amplifiers realizes fixed frequency separation between upstream and downstream. For example, in some embodiments, the trunk amplifier enables downstream transmission from 108 MHz and upstream transmission up to 85 MHz. Further, in other

embodiments, the trunk amplifier may enable downstream transmission from 840 MHz and upstream transmission up to 684 MHz. From this it can be seen that the diplexer in trunk amplifiers makes it impossible to switch between using the FDX band for downstream and upstream. DOCSIS 3.1 FDX specifies operation in an N+0

configuration, meaning that there are no amplifiers in the path. This is limiting the adoption of FDX, since cable plant changes are expensive. Therefore, an alternate option is to implement FDX operation in existing non N+0 plants (i.e. , having trunk amplifiers in the path).

[0023] The FDX specifications allow for 8 different resource block allocations, from DDD to UUU. In some embodiments, DDD corresponds to all FDX channels within the FDX frequency band (typically 3 frequency channels) being downstream and UUU corresponds to all FDX channels within the FDX frequency band being upstream. One possible way to enable FDX operation in a non N+0 plant include implementing echo cancelling mechanisms in the plant amplifiers (i.e., the trunk amplifiers). In other words, in order to implement full DOCSIS FDX functionality the amplifiers must be able to simultaneously pass the FDX band in the upstream and the downstream directions, which will probably require echo cancelling in the amplifier. Echo cancelling (EC) is a complicated task which may result in high cost of the amplifiers - as in addition to simply amplifying the signal the EC requires training processes, periodic

maintenance/re-training, and may require the amplifier to implement communication with other network entities.

[0024] In order to provide a less complicated alternative, a system and a method to implement a limited-functionality DOCSIS FDX in a non-“N+0” plant is proposed in this disclosure. In particular, an FDX trunk amplifier circuit configured to enable a downstream transmission of a downstream data signal associated with a remote PHY (RPHY) circuit in a FDX frequency band and an upstream transmission of an upstream data signal from one or more associated cable modems (CMs) in the FDX frequency band, based on a filter control signal associated with the RPHY circuit is proposed. In some embodiments, the filter control signal comprises a direct current (DC) control signal. However, other control signals, for example, out of band analog signals are also contemplated to be within the scope of this disclosure. In some embodiments, the FDX trunk amplifier circuit is configured to enable the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band, at different instances, such that the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band do not overlap, further details of which are given in embodiments below.

[0025] In some embodiments, the proposed FDX trunk amplifier circuit replaces the legacy trunk/field amplifiers in cable plants. In some embodiments, the proposed implementation enables cable operators to get some of the benefits of full duplex DOCSIS (i.e., UUU and DDD in FDX band) while not having to change the plant to N+0 configuration, and not having to design a dedicated communication subsystem to control the field amplifiers. In some embodiments, the proposed implementation enables significant savings by the network operator while still enabling FDX operation. The suggested implementation does not impose limitations on the rest of the plant, and does not require significant changes to cable modem termination system (CMTS) or cable modems (CMs). Trunk amplifiers implementing the control signaling (i.e., the FDX trunk amplifier circuit proposed herein) may function in a plant that does not support the control signaling and will default to non-FDX configuration, but ready to participate when FDX is enabled.

[0026] Fig. 1 depicts a simplified block diagram of a wireline communication system 100 that supports limited-functionality full duplex (FDX) communications, according to one embodiment of the disclosure. In some embodiments, the wireline communication system 100 comprises a data over cable service interface specification (DOCSIS) system. In some embodiments, the wireline communication system 100 comprises a non-“N+0” configuration having one or more amplifiers in the signal path. The wireline communication system 100 comprises a remote PHY (RPHY) circuit 102, an FDX trunk amplifier circuit 104 and a cable modem (CM) 106. In some embodiments, the FDX trunk amplifier circuit 104 is configured to amplify/convey data signals between the RPHY circuit 102 and one or more cable modems (CMs) (e.g., the CM 106) associated therewith. In this embodiment, the RPHY circuit 102 associated with the wireline communication system 100 is shown to be coupled to a single FDX trunk amplifier circuit 104 in a single branch. However, in other embodiments, the RPHY circuit 102 may be coupled to one or more branches, each branch comprising one or more FDX trunk amplifier circuits. In some embodiments, each of the FDX trunk amplifier circuits (e.g., the FDX trunk amplifier circuit 104) may be coupled to one or more CMs.

[0027] In some embodiments, the RPHY circuit 102 comprises a node circuit comprising a plurality of components located at a head-end location (e.g., as part of the CMTS) or at a remote location closer to the customer (i.e., away from the central location) of a cable modem communication network. In some embodiments, the RPHY circuit 102 is configured to be coupled to the FDX trunk amplifier circuit 104 over coax cables. In some embodiments, the FDX trunk amplifier circuit 104 comprises a trunk amplifier circuit 108 comprising a switched filter circuit 1 10 and an amplifier circuit 1 12.

In some embodiments, the amplifier circuit 1 12 is configured to convey a downstream transmission of a downstream data signal associated with the RPHY circuit 102 in an FDX frequency band and an upstream transmission of an upstream data signal associated with the CM 106 in the FDX frequency band. In some embodiments, the FDX frequency band comprises one or more FDX channels. In some embodiments, a range of frequencies within the FDX band is predefined. In some embodiments, the FDX frequency band covers a range of frequencies from 108 MHz - 684 MHz.

However, in other embodiments, the range of frequencies included within the FDX band may be different. In some embodiments, the downstream data signal comprises a data signal transmitted from the RPHY circuit 102 to the CM 106 and the upstream data signal comprises a data signal transmitted from the CM 106 to the RPHY circuit 102. In some embodiments, the downstream data signal and the upstream data signal comprise DOCSIS signals.

[0028] In some embodiments, the amplifier circuit 1 12 is configured to convey the downstream transmission of the downstream data signal associated with the RPHY circuit 102 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the CM 106 in the FDX frequency band, at different instances, based on a filter control signal 1 19 associated with the RPHY circuit 102. In particular, the amplifier circuit 1 12 is configured to convey the downstream transmission of the downstream data signal in the FDX frequency band and the upstream

transmission of the upstream data signal in the FDX frequency band, at different instances, such that the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band do not overlap. In some

embodiments, the different instances refer to different time instances. In other words, at any instance/time, all the FDX channels associated with the FDX band support either downstream transmission or upstream transmission. In some embodiments, conveying the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band, at different instances (with no overlap), enables to eliminate echo cancelling

mechanisms within the amplifier circuit 1 12.

[0029] In some embodiments, the switched filter circuit 1 10 comprises a filter circuit 1 10b configured to be coupled to the amplifier circuit 1 12, based on the filter control signal 1 19. In some embodiments, the filter circuit 1 10b is further configured to provide the downstream transmission of the downstream data signal associated with the RPHY circuit 102 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the CM 106 in the FDX frequency band, to the amplifier circuit 1 12, at different instances. In some embodiments, the filter circuit 1 10b is configured to filter a downstream data signal associated with the RPHY circuit 102 and an upstream data signal associated with the CM 106, in order to provide the

downstream data signal associated with the RPHY circuit 102 in the FDX frequency band and the upstream data signal associated with the CM 106 in the FDX frequency band, respectively, to the amplifier circuit 1 12. In some embodiments, the switched filter circuit 1 10 further comprises a switching circuit 1 10a configured to couple the filter circuit 1 10b to the amplifier circuit 1 12, based on the filter control signal 1 19 (in particular, based on a switching control signal 120 derived from the filter control signal 1 19), in order to enable the filter circuit 1 10b to provide the downstream transmission of the downstream data signal associated with the RPHY circuit 102 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 106 in the FDX frequency band, to the amplifier circuit 1 12, at different instances. In this embodiment, the filter circuit 1 10b and the switching circuit 1 10a are shown to be coupled to the amplifier circuit 1 12 from only one side, for the ease of reference. However, in other embodiments, the filter circuit 1 10b may comprise two or more filter circuits configured to be coupled to the amplifier circuit 1 12 from both sides, in order to filter the downstream data signal and the upstream data signal, prior to providing the downstream data signal and the upstream data signal to the amplifier circuit 1 12. In such embodiments, the switching circuit 1 10a also comprises two or more switching circuits configured to couple the two or more filter circuits to the amplifier circuit 1 12.

[0030] In one example embodiment, the filter circuit 1 10b comprises a first diplexer circuit configured to provide a downstream transmission of a downstream data signal associated with the RPHY circuit 102 in a FDX frequency band and a second diplexer circuit configured to provide an upstream transmission of an upstream data signal associated with the one or more CMs 106 in the FDX frequency band, based on filter control signal 1 19. In some embodiments, the switching circuit 1 10b comprises one or more switches configured to be switched, in order to couple the downstream data signal to the first diplexer circuit and to couple the upstream data signal to the second diplexer circuit, at different instances, based on the filter control signal 1 19. In some

embodiments, switching the one or more switches based on the filter control signal 1 19, facilitates the first diplexer circuit and the second diplexer circuit to provide the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band, respectively, at different instances, in a way that the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band do not overlap, further details of which are given in an embodiment below.

[0031] Alternately, in another embodiment, the filter circuit 1 10b comprises a triplexer circuit configured to provide a downstream transmission of a downstream data signal associated with the RPHY circuit 102 in the FDX frequency band and provide an upstream transmission of an upstream data signal associated with the one or more CMs 106 in the FDX frequency band, based on the filter control signal 1 19. In some embodiments, the switching circuit 1 10a comprises one or more switches configured to be switched, based on the filter control signal 1 19, in order to enable the triplexer circuit to provide the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band, at different instances, in a way that the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band do not overlap, further details of which are given in an embodiment below. However, in other embodiments, other implementations of the filter circuit 1 10b are also contemplated to be within the scope of this disclosure.

[0032] In some embodiments, the amplifier circuit 1 12 may comprise a downstream FDX amplifier circuit configured to amplify the downstream transmission signal in the FDX frequency band and an upstream FDX amplifier circuit configured to amplify the upstream transmission signal in the FDX frequency band. In some embodiments, the FDX trunk amplifier circuit 104 further comprises a filter control circuit 1 14 configured to generate the switching control signal 120 based on the filter control signal 1 19. In some embodiments, the filter control circuit 1 14 comprises a control block circuit 1 16 and a control signal decoder circuit 1 18. In some embodiments, the control block circuit 1 16 is configured to receive the filter control signal 1 19 associated with the RPHY circuit 102 and the control signal decoder circuit 1 18 is configured to decode the filter control signal 1 19 and generate the switching control signal 120 based thereon, to control the switching circuit 1 10a. [0033] In some embodiments, the filter control signal 1 19 comprises information indicative of a configuration associated with the trunk amplifier circuit 108. In some embodiments, the filter control signal 1 19 comprises a direct current (DC) control signal. However, other control signals, for example, out of band analog signals are also contemplated to be within the scope of this disclosure. In some embodiments, a value of a predefined parameter (e.g., a voltage level) associated with the filter control signal 1 19 is indicative of a configuration associated with the trunk amplifier circuit 108. In particular, in some embodiments, the value of the predefined parameter comprises a first parameter value indicative of a first predefined configuration of the trunk amplifier circuit 108 that enables the downstream transmission of the downstream data signal associated with the RPHY circuit 102 to the one or more CMs 106 in the FDX frequency band, and a second parameter value indicative of a second, different, predefined configuration of the trunk amplifier circuit 108 that enables the upstream transmission of the upstream data signal associated with the one or more CMs 106 to the RPHY circuit 102 in the FDX frequency band. In some embodiments, the control block circuit 1 16 is further configured to forward/couple the filter control signal 1 19 to the CM side of the trunk amplifier circuit, in order to propagate the filter control signal 1 19 to further FDX trunk amplifier circuits (not shown) in the corresponding branch.

[0034] In some embodiments, the RPHY circuit 102 comprises a control signal driver circuit 124 configured to provide the filter control signal 1 19 to the FDX trunk amplifier circuit 104 and a signal processing circuit 122 configured to generate the filter control signal 1 19 based on a required resource block allocation (RBA). In some embodiments, the value of the predefined signal parameter associated with the filter control signal 1 19 is set based on the required RBA. In some embodiments, the signal processing circuit

122 is further configured to determine the RBA comprising scheduling the downstream transmission of the downstream data signal associated with the RPHY circuit 102 to the one or more CMs 106 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 106 to the RPHY circuit 102 in the FDX frequency band, based on network requirements. In some embodiments, the downstream transmission of the downstream data signal associated with the RPHY circuit 102 to the one or more CMs 106 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 106 to the RPHY circuit 102 in the FDX frequency band are scheduled by the signal processing circuit 122, at different instances, in a way that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream

transmission of the upstream data signal in the FDX frequency band do not overlap.

[0035] During deployment, the CMs may be separated in to different branches (e.g., by a network planner), in order to be able to assign different direction for the CMs of the branch so that CMs in one branch can transmit while the other branch receives. This is possible only if the branches do not have a common amplifier between them and the RPHY (otherwise they have to share the same RBA). To assign an amplifier (i.e., the FDX trunk amplifier circuit) to a branch, in some embodiments, a predefined setting is set for the amplifier (e.g., by a field technician), to be utilized to decode the incoming filter control signal 1 19. In some embodiments, predefined setting may be set as DC level, as a bit in memory, physical jumper on the PCB etc. In some embodiments, the predefined setting facilitates the FDX trunk amplifier circuit to interpret the filter control signal 1 19 (in particular, to interpret the value of the predefined parameter associated with the filter control signal 1 19), in order to set the FDX trunk amplifier circuit in a respective configuration. In some embodiments, the setting can be set in the field (e.g., by a technician) using any applicable method such as using a simple digital control dial with 7-segment digits, a potentiometer to set a DC level, control interface such as RS- 232 or USB, jumpers or any other method to define a fixed setting.

[0036] Fig. 2 depicts an exemplary implementation of a wireline communication system 200 that supports limited-functionality full duplex (FDX) communications, according to one embodiment of the disclosure. In some embodiments, the wireline communication system 200 comprises a data over cable service interface specification (DOCSIS) system. In some embodiments, the wireline communication system 200 comprises a non-“N+0” configuration having one or more amplifiers in the signal path. In some embodiments, the wireline communication system 200 comprises an example implementation of the wireline communication system 100 in Fig. 1 . In particular, in the wireline communication system 200, the filter control signal comprises a direct current (DC) control signal. The wireline communication system 200 comprises a remote PHY (RPHY) circuit 202, an FDX trunk amplifier circuit 204 and a cable modem (CM) 206. In some embodiments, the FDX trunk amplifier circuit 204 is configured to amplify/convey data signals between the RPHY circuit 202 and one or more cable modems (CMs) (e.g., the CM 206) associated therewith. In this embodiment, the RPHY circuit 202

associated with the wireline communication system 200 is shown to be coupled to a single FDX trunk amplifier circuit 204 in a single branch. However, in other

embodiments, the RPHY circuit 202 may be coupled to one or more branches, each branch comprising one or more FDX trunk amplifier circuits. In some embodiments, each of the FDX trunk amplifier circuits (e.g., the FDX trunk amplifier circuit 204) may be coupled to one or more CMs.

[0037] In some embodiments, the RPHY circuit 202 comprises a node circuit comprising a plurality of components located at a head-end location or at a remote location closer to the customer (i.e., away from the central location) of a cable modem communication network. In some embodiments, the RPHY circuit 202 is configured to be coupled to the FDX trunk amplifier circuit 204 over coax cables. In some

embodiments, the FDX trunk amplifier circuit 204 comprises a trunk amplifier circuit 208 comprising a switched filter circuit 210 and an amplifier circuit 212. In some

embodiments, the amplifier circuit 212 is configured to convey a downstream

transmission of a downstream data signal associated with the RPHY circuit 202 in an FDX frequency band and an upstream transmission of an upstream data signal associated with the CM 206 in the FDX frequency band. In some embodiments, the amplifier circuit 212 is configured to convey the downstream transmission of the downstream data signal associated with the RPHY circuit 202 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the CM 206 in the FDX frequency band, at different instances, based on a DC control signal 219 (in particular, based on a DC switching signal 220 derived from the DC control signal 219) associated with the RPHY circuit 202. In some embodiments, the amplifier circuit 212 is configured to enable the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band, at different instances, such that the downstream transmission in the FDX frequency band and the upstream transmission in the FDX frequency band do not overlap.

[0038] In some embodiments, the switched filter circuit 210 comprises a filter circuit 210b configured to be coupled to the amplifier circuit 212, based on the filter control signal 219. In some embodiments, the filter circuit 210b is further configured to provide the downstream transmission of the downstream data signal associated with the RPHY circuit 202 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the CM 206 in the FDX frequency band, to the amplifier circuit 212, at different instances. In some embodiments, the filter circuit 21 Ob is configured to filter a downstream data signal associated with the RPHY circuit 202 and an upstream data signal associated with the CM 205, in order to provide the

downstream data signal associated with the RPHY circuit 202 in the FDX band and the upstream data signal associated with the CM 206 in the FDX band, to the amplifier circuit 212. In some embodiments, the switched filter circuit 210 further comprises a switching circuit 210a configured to couple the filter circuit 21 Ob to the amplifier circuit 212, based on the DC control signal 219 (in particular, based on a DC switching signal 220 derived from the DC control signal 219), in order to enable the filter circuit 210b to provide the the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 206 in the FDX frequency band, to the amplifier circuit 212, at different instances. In this embodiment, the filter circuit 210b and the switching circuit 210a are shown to be coupled to the amplifier circuit 212 from only one side, for the ease of reference. However, in other embodiments, the filter circuit 210b may comprise two or more filter circuits configured to be coupled to the amplifier circuit 212 from both sides, in order to filter the downstream data signal and the upstream data signal, prior to providing the downstream data signal and the upstream data signal to the amplifier circuit 212. In such embodiments, the switching circuit 210a also comprises two or more switching circuits configured to couple the two or more filter circuits to the amplifier circuit 212.

[0039] In some embodiments, the amplifier circuit 212 may comprise a downstream

FDX amplifier circuit configured to amplify the downstream transmission signal in the

FDX frequency band and an upstream FDX amplifier circuit configured to amplify the upstream transmission signal in the FDX frequency band. In some embodiments, the

FDX trunk amplifier circuit 204 further comprises a DC control circuit 214 (similar to the filter control circuit 1 14 in Fig. 1 ) configured to generate the DC switching signal 220. In some embodiments, the DC control circuit 214 further comprises a DC block circuit 216

(similar to the control block circuit 1 16 in Fig. 1 ) and a DC level decoder circuit 218

(similar to the control signal decoder circuit 1 18 in Fig. 1 ). In some embodiments, the DC block circuit 216 is configured to receive the DC control signal 219 associated with the RPHY circuit 202 and the DC level decoder circuit 218 is configured to decode the DC control signal 219 and generate the DC switching signal 220 based thereon, to control the switching circuit 210a. In some embodiments, the DC block circuit 216 is configured to receive the DC control signal 219 directly from the RPHY circuit 202 over coax cables. However, in other embodiments, the DC block circuit 216 may be configured to receive the DC control signal 219 from a further FDX trunk amplifier circuit (not shown), coupled between the RPHY circuit 202 and the FDX trunk amplifier circuit 204.

[0040] In some embodiments, a value of a signal parameter (e.g., a DC value) associated with the DC control signal 219 is indicative of a predefined configuration associated with the FDX trunk amplifier circuit 204. In particular, in some embodiments, the DC value comprises a first DC value indicative of a first predefined configuration of the trunk amplifier circuit 208 that enables the downstream transmission of the downstream data signal associated with the RPHY circuit 202 to the one or more CMs 206 in the FDX frequency band, and a second DC value indicative of a second, different, predefined configuration of the trunk amplifier circuit 208 that enables the upstream transmission of the upstream data signal associated with the one or more CMs 206 to the RPHY circuit 202 in the FDX frequency band. However, other parameters of the DC control signal, different from the DC value, may be utilized, in other embodiments, in order to define a configuration associated with the FDX trunk amplifier circuit 204. In some embodiments, the DC block circuit 216 is further configured to forward/couple the DC control signal 219 to the CM side of the trunk amplifier circuit, in order to propagate the DC level to further FDX trunk amplifier circuits (not shown) downstream in the corresponding branch.

[0041] One possible method to decode the DC control signal 219 within the DC level decoder circuit 218 comprises digitizing a DC level (e.g., the DC value) associated with the DC control signal 219 using a fixed reference voltage to a pre-defined number of bits (for example - 3 bits), and using a select bit in the digitized DC level as a control bit (for example bit 2). In some embodiments, the select bit to be used as the control bit is predefined (e.g., set by a technician). Using such scheme, in some embodiments, the RPHY circuit 202 may set a single voltage level that will be encoded and propagated in the network to achieve the target network configuration, using the DC level as set by the technician to decide on functionality (digitize the voltage to 3 bits and check bit number 2, in the above example). Such encoding will enable 8 groups that can be controlled by using 8 encoded DC levels. However, in other embodiments, other methods of encoding/decoding the DC level and specifying the specific interpretation of the received DC may be implemented. DC level encoding is used as an example, but same functionality can be achieved by out-of-band signaling using tones at pre-defined frequencies outside of the DOCSIS band or any other non-DOCSIS encoding of the amplifier setting, in other embodiments.

[0042] In some embodiments, the RPHY circuit 202 comprises a DC driver circuit 224 (similar to the control signal driver circuit 124 in Fig. 1 ) configured to provide the DC control signal 219 to the FDX trunk amplifier circuit 204 and a signal processing circuit 222 configured to generate the DC control signal 219. In some embodiments, the signal processing circuit 222 is configured to generate the DC control signal 219 based on a required resource block allocation (RBA) of the one or more CMs 206 coupled to the FDX trunk amplifier circuit 204. In some embodiments, the DC value of the DC control signal 219 is set based on the required RBA. In some embodiments, the signal processing circuit 222 is further configured to determine the RBA comprising scheduling the downstream transmission of the downstream data signal associated with the RPHY circuit 202 to the one or more CMs 206 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 206 to the RPHY circuit 202 in the FDX frequency band, based on network requirements. In some embodiments, the downstream transmission of the downstream data signal associated with the RPHY circuit 202 to the one or more CMs 206 in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs 206 to the RPHY circuit 202 in the FDX frequency band are scheduled by the signal processing circuit 222, at different instances, in a way that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0043] Fig. 3a illustrates an example implementation of a full duplex (FDX) trunk amplifier circuit 300, according to one embodiment of the disclosure. In some embodiments, the FDX trunk amplifier circuit 300 comprises one possible way of implementation of the FDX trunk amplifier circuit 104 in Fig. 1 and the FDX trunk amplifier circuit 204 in Fig. 2. However, other implementations of the FDX trunk amplifier circuit 104 in Fig. 1 and the FDX trunk amplifier circuit 204 in Fig. 2 are also contemplated to be within the scope of this disclosure. The FDX trunk amplifier circuit 300 comprises a trunk amplifier circuit 301 and a filter control circuit 303. The trunk amplifier circuit 301 comprises an amplifier circuit comprising a downstream FDX amplifier circuit 302a and an upstream FDX amplifier circuit 302b. In some

embodiments, the downstream FDX amplifier circuit 302a is configured to

convey/amplify a downstream transmission of a downstream data signal associated with an RPHY circuit (e.g., the RPHY circuit 202 in Fig. 2) in the FDX frequency band and the upstream FDX amplifier circuit 302b is configured to convey/amplify an upstream transmission of an upstream data signal associated with the one or more CMs (e.g., the CM 206 in Fig. 2) in the FDX frequency band. In some embodiments, the downstream FDX amplifier circuit 302a is configured to convey/amplify the downstream transmission of the downstream data signal in the FDX frequency band and the upstream FDX amplifier circuit 302b is configured to convey/amplify the upstream transmission of the upstream data signal in the FDX frequency band, at different instances, based on a filter control signal 305. In some embodiments, the downstream FDX amplifier circuit 302a is configured to convey/amplify the downstream transmission of the downstream data signal in the FDX frequency band and the upstream FDX amplifier circuit 302b is configured to convey/amplify the upstream transmission of the upstream data signal in the FDX frequency band, at different instances, so that the upstream transmission in the FDX band and the downstream transmission in the FDX band do not overlap. In some embodiments, the FDX frequency band covers a range of frequencies from 108 MHz - 684 MHz. However, in other embodiments, the range of frequencies within the FDX frequency band may vary.

[0044] The trunk amplifier circuit 301 further comprises a first diplexer circuit comprising a first downstream filter circuit 304 and a first upstream filter circuit 306. In some embodiments, the first diplexer circuit is configured to provide a downstream transmission of a downstream data signal associated with an RPHY circuit (e.g., the

RPHY circuit 202 in Fig. 2) in an FDX frequency band. In some embodiments, a passband frequency of the first downstream filter circuit 304 is configured to overlap with the FDX frequency band, in order to provide the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band.

In some embodiments, the first downstream filter circuit 304 is configured to be coupled to the downstream FDX amplifier circuit 302a and the first upstream filter circuit 306 is configured to be coupled to the upstream FDX amplifier circuit 302b, based on the filter control signal 305, in order to provide the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band. In some embodiments, the first downstream filter circuit 304 and the first upstream filter circuit 306 are frequency separated (i.e., the passband frequency of the first downstream filter circuit 304 and the first upstream filter circuit 306 are different). In some embodiments, the first downstream filter circuit 304 comprises a first front-end filter circuit 304a and a first back-end filter circuit 304b, both of which are configured to be coupled to the downstream FDX amplifier circuit 302a from opposite ends. Further, in some

embodiments, the first upstream filter circuit 306 comprises a first upstream front-end filter circuit 306a and a first upstream back-end filter circuit 306b, both of which are configured to be coupled to the upstream FDX amplifier circuit 302b from opposite ends. However, in other embodiments, the first downstream filter circuit 304 and the first upstream filter circuit 306 may be implemented differently.

[0045] Further, the trunk amplifier circuit 301 comprises a second diplexer circuit comprising a second downstream filter circuit 308 and a second upstream filter circuit

310. In some embodiments, the second diplexer circuit is configured to provide an upstream transmission of an upstream data signal associated with the one or more CMs

(e.g., the CM 206 in Fig. 2) in the FDX frequency band. In some embodiments, a passband frequency of the second upstream filter circuit 310 is configured to overlap with the FDX frequency band, in order to provide the upstream transmission of the upstream data signal in the FDX frequency band. In some embodiments, the second downstream filter circuit 308 is configured to be coupled to the downstream FDX amplifier circuit 302a and the second upstream filter circuit 310 is configured to be coupled to the upstream FDX amplifier circuit 302b, based on the filter control signal

305, in order to provide the upstream transmission of the upstream data signal in the

FDX frequency band. In some embodiments, the second downstream filter circuit 308 and the second upstream filter circuit 310 are frequency separated (i.e., the passband frequency of the second downstream filter circuit 308 and the second upstream filter circuit 310 are different). In some embodiments, the second downstream filter circuit 308 comprises a second downstream front-end filter circuit 308a and a second downstream back-end filter circuit 308b, both of which are configured to be coupled to the downstream FDX amplifier circuit 302a from opposite ends. Further, in some embodiments, the second upstream filter circuit 310 comprises a second upstream front-end filter circuit 310a and a second upstream back-end filter circuit 310b, both of which are configured to be coupled to the upstream FDX amplifier circuit 302b from opposite ends. However, in other embodiments, the second downstream filter circuit 308 and the second upstream filter circuit 310 may be implemented differently.

[0046] Fig. 3b shows an example embodiment of the frequency response 350 of the first diplexer circuit in Fig. 3a. In particular, the first downstream filter circuit 304 has a passband frequency range greater than 108 MHz, which overlaps with the FDX frequency band and the first upstream filter circuit 306 has a passband frequency range up to 85 MHz. In this embodiment (also in Fig. 3a), the first downstream filter circuit 304 is implemented as a high-pass filter and the first upstream filter circuit 306 is

implemented as a low-pass filter. However, in other embodiments, other

implementations are possible. Further, the frequency ranges shown here are mere examples and the frequency ranges may be chosen differently in different

embodiments, as long as they overlap with the FDX frequency band. Similarly, Fig. 3c shows an example embodiment of the frequency response 360 of the second diplexer circuit in Fig. 3a. In particular, the second downstream filter circuit 308 has a passband frequency range greater than 804 MHz and the second upstream filter circuit 310 has a passband frequency range up to 684 MHz, which overlaps with the FDX frequency band. In this embodiment (also in Fig. 3a), the second downstream filter circuit 308 is implemented as a high-pass filter and the second upstream filter circuit 310 is implemented as a low-pass filter. However, in other embodiments, other

implementations are possible. Further, the frequency ranges shown here are mere examples and the frequency ranges may be chosen differently in different

embodiments, as long as they overlap with the FDX frequency band.

[0047] Referring back to Fig. 3a again , in some embodiments, the trunk amplifier circuit 301 further comprises a switching circuit comprising a plurality of switches (in particular, the switches 318a, 318b, 318c, 318d, 320a, 320b, 320c and 320d) configured to be switched, based on the switching control signal 316 (derived from the filter control signal 305), in order to facilitate the first diplexer circuit to provide the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band and to facilitate the second diplexer circuit to provide the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band, respectively, at different instances. In some embodiments, the switching circuit is configured to couple the first downstream filter circuit 304 to the downstream FDX amplifier circuit 302a (via the switches 318 a, 318b, 318c and 318d) and the first upstream filter circuit 306 to the upstream FDX amplifier circuit 302b, based on the switching control signal 316 (derived from the filter control signal 305), in order to enable the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band. Furthermore, the switching circuit is configured to couple the second downstream filter circuit 308 to the downstream FDX amplifier circuit 302a and the second upstream filter circuit 310 to the upstream FDX amplifier circuit 302b, based on the switching control signal 316 (derived from the filter control signal 305), in order to enable the upstream transmission of the upstream data signal associated with the RPHY circuit in the FDX frequency band. In some

embodiments, the first diplexer circuit, the second diplexer circuit and the switching circuit together form a switched filter circuit (e.g., the switched filter circuit 210 in Fig. 2).

[0048] In some embodiments, the filter control circuit 303 is configured to generate the switching control signal 316. In some embodiments, the filter control circuit 303 is configured to generate the switching control signal 316 based on the filter control signal

305 received from the RPHY circuit or from a further FDX trunk amplifier circuit coupled between the RPHY circuit and the filter control circuit 303. In some embodiments, the filter control circuit 303 comprises a control block circuit 312 configured to receive the filter control signal 305 associated with the RPHY circuit and a control signal decoder circuit 314 configured to decode the filter control signal 305 and generate the switching control signal 316 to control the switching circuit comprising the switches. In some embodiments, the control block circuit 312 is further configured to forward/couple the filter control signal 305 to the CM side of the trunk amplifier circuit 301 , in order to propagate the filter control signal 305 to further FDX trunk amplifier circuits (not shown) in the corresponding branch. In some embodiments, the FDX trunk amplifier circuit 300 further comprises a control signal coupling circuit 322 configured to couple to the filter control signal 305 received from the control block circuit 312. In particular, in some embodiments, the control signal coupling circuit 322 comprises a coupling block 324 configured to couple to the filter control signal 305 and a control signal generator circuit 326 configured to process the received filter control signal 305 (e.g., up the DC level), before further propagation.

[0049] In some embodiments, a value of a signal parameter associated with the filter signal 305 is indicative of a predefined configuration associated with the trunk amplifier circuit 301. In particular, in some embodiments, the value of the signal parameter comprises a first parameter value indicative of a first predefined configuration of the trunk amplifier circuit 301 , wherein the first diplexer circuit is coupled to the amplifier circuit (302a and 302b), thereby enabling the downstream transmission of the downstream data signal associated with the RPHY circuit to the one or more CMs in the FDX frequency band. In some embodiments, the value of the signal parameter further comprises a second parameter value indicative of a second, different, predefined configuration of the trunk amplifier circuit 301 , wherein the second diplexer circuit is coupled to the amplifier circuit (302a and 302b), thereby enabling the upstream transmission of the upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band.

[0050] Fig. 4 illustrates an example implementation of a full duplex (FDX) trunk amplifier circuit 400, according to one embodiment of the disclosure. In some embodiments, the FDX trunk amplifier circuit 400 comprises another possible way of implementation of the FDX trunk amplifier circuit 104 in Fig. 1 and the FDX trunk amplifier circuit 204 in Fig. 2. The FDX trunk amplifier circuit 400 comprises a trunk amplifier circuit 402 and a filter control circuit 404. The trunk amplifier circuit 402 comprises an amplifier circuit comprising a downstream non-FDX amplifier circuit 406a, a downstream FDX amplifier circuit 406b, an upstream FDX amplifier circuit 406c and an upstream non-FDX amplifier circuit 406d. In some embodiments, the downstream FDX amplifier circuit 406b is configured to convey/amplify a downstream transmission of a downstream data signal associated with an RPHY circuit (e.g., the RPHY circuit 202 in Fig. 2) in the FDX frequency band and the upstream FDX amplifier circuit 406c is configured to convey/amplify an upstream transmission of an upstream data signal associated with the one or more CMs (e.g., the CM 206 in Fig. 2) in the FDX frequency band. In some embodiments, the downstream FDX amplifier circuit 406b is configured to convey/amplify the downstream transmission of the downstream data signal in the FDX frequency band and the upstream FDX amplifier circuit 406c is configured to convey/amplify the upstream transmission of the upstream data signal in the FDX frequency band, at different instances, based on a filter control signal 416. In some embodiments, the downstream FDX amplifier circuit 406b is configured to

convey/amplify the downstream transmission of the downstream data signal in the FDX frequency band and the upstream FDX amplifier circuit 406c is configured to

convey/amplify the upstream transmission of the upstream data signal in the FDX frequency band, at different instances, so that the upstream transmission in the FDX band and the downstream transmission in the FDX band do not overlap. In some embodiments, the FDX frequency band covers a range of frequencies from 108 MHz - 684 MHz. However, in other embodiments, the range of frequencies within the FDX frequency band may vary.

[0051] The trunk amplifier circuit 402 further comprises a triplexer circuit (same as the filter circuit 210b in Fig. 2) configured to provide a downstream transmission of a downstream data signal associated with an RPHY circuit (not shown) in a FDX frequency band and provide an upstream transmission of an upstream data signal associated with the one or more CMs (not shown) in the FDX frequency band, based on a filter control signal 405 (in particular, based on a switching control signal 416 derived from the filter signal 405). In some embodiments, the filter control signal 405 comprises a DC control signal. However, in other embodiments, the filter control signal 405 may comprise other signals, for example, out-of-band signals etc. In some embodiments, the FDX frequency band covers a range of frequencies from 108 MHz - 684 MHz. However, in other embodiments, the range of frequencies may vary.

[0052] In some embodiments, the triplexer circuit comprises a downstream non-FDX filter circuit comprising filter circuits 408a and 408b coupled to the downstream non-FDX amplifier circuit 406a and configured to provide a downstream transmission of a downstream data signal associated with an RPHY circuit (not shown) in a first predefined non-FDX frequency band. In this example embodiment, the downstream non-FDX filter circuit comprising filter circuits 408a and 408b are implemented as high pass filters having a passband frequency greater than 804 MHz, however, in other embodiments the downstream non-FDX filter circuit 408 may be implemented differently. In some embodiments, the triplexer circuit further comprises an upstream non-FDX filter circuit comprising filter circuits 412a and 412b coupled to the upstream non-FDX amplifier circuit 406d and configured to provide an upstream transmission of an upstream data signal associated with the one or more CMs in a second, different, predefined non-FDX frequency band. In this example embodiment, the upstream non- FDX filter circuit comprising filter circuits 412a and 412b are implemented as low pass filters having a passband frequency up to 85 MHz, however, in other embodiments, the upstream non-FDX filter circuit 412 may be implemented differently. In some

embodiments, the downstream non-FDX filter circuit and upstream non-FDX filter circuit enables to maintain legacy system response in parallel with FDX functionality.

[0053] In some embodiments, the triplexer circuit further comprises an FDX filter circuit comprising a front-end FDX filter circuit 410a and a back-end FDX filter circuit 410b configured to provide the downstream transmission of the downstream data signal in the FDX frequency band associated with the RPHY circuit and the upstream transmission of the upstream data signal in the FDX frequency band associated with the one or more CMs, based on the switching control signal 416. In some embodiments, the passband frequency of the FDX filter circuit (i.e., the front-end FDX filter circuit 41 Oa and the back end FDX filter circuit 410b) overlaps with the FDX frequency band (i.e., 108 MHz-684 MHz in this example). In this example embodiment, FDX filter circuit comprising the filter circuits 410a and 410b are implemented as band pass filters having a passband frequency 108 MHz-684 MHz, however, in other embodiments the FDX filter circuit 410 may be implemented differently. The frequency ranges described in this embodiment are mere examples, and are not to be construed to be limited.

[0054] In some embodiments, the trunk amplifier circuit 402 further comprises a switching circuit (e.g., the switching circuit 210a in Fig. 2) comprising the switches 407a and 407b configured to couple the FDX filter circuit 41 Oa and 41 Ob, to the downstream FDX amplifier circuit 406b and the upstream FDX amplifier circuit 406c, based on the switching control signal 416. In some embodiments, the switching circuit 407 is switched based on the switching control signal 416, in order to couple the FDX filter circuit 41 Oa and 41 Ob to the downstream FDX amplifier circuit 406b, in order to enable the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band, and to couple the FDX filter circuit 410and 410b to the upstream FDX amplifier circuit 406c, in order to enable the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band, at different instances.

[0055] In some embodiments, the filter control circuit 404 is configured to generate the switching control signal 416. In some embodiments, the filter control circuit 404 is configured to generate the switching control signal 416 based on the filter control signal 405 received from the RPHY circuit or from a further FDX trunk amplifier circuit coupled between the RPHY circuit and the filter control circuit 404. In some embodiments, the filter control circuit 404 comprises a control block circuit 417 configured to receive the filter control signal 405 associated with the RPHY circuit and a control signal decoder circuit 418 configured to decode the filter control signal 405 and generate the switching control signal 416, based thereon, to control the triplexer circuit via the switches 407a and 407b (i.e., the switching circuit). In some embodiments, the control block circuit 417 is further configured to forward/couple the filter control signal 405 to the CM side of the trunk amplifier circuit 402, in order to propagate the filter control signal 405 to further FDX trunk amplifier circuits (not shown) in the corresponding branch. In some embodiments, the FDX trunk amplifier circuit 400 further comprises a control signal coupling circuit 422 configured to couple to the filter control signal 405 received from the control block circuit 417. In particular, in some embodiments, the control signal coupling circuit 422 comprises a coupling block 424 configured to couple to the filter control signal 405 and a control signal generator circuit 426 configured to process the received filter control signal 405 (e.g., up the DC level), before further propagation.

[0056] In some embodiments, a parameter value associated with the filter control signal 405 is indicative of a configuration associated with the trunk amplifier circuit 402. In particular, in some embodiments, the parameter value comprises a first parameter value indicative of a first predefined configuration of the trunk amplifier circuit 402, wherein the FDX filter circuits 410a and 410b are coupled to downstream FDX amplifier circuit 406b (via the switches 407a and 407b), thereby enabling the downstream transmission of the downstream data signal associated with the RPHY circuit to the one or more CMs in the FDX frequency band. In some embodiments, the parameter value further comprises a second parameter value indicative of a second, different, predefined configuration of the trunk amplifier circuit 402, wherein the FDX filter circuits 410a and 41 Ob are coupled to upstream FDX amplifier circuit 406c (via the switches 407a and 407b), thereby enabling the upstream transmission of the upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band.

[0057] Fig. 5 illustrates an example implementation of a wireline communication network 500 that enables limited functionality full duplex (FDX) communications, according to one embodiment of the disclosure. In some embodiments, the wireline communication network 500 comprises a non-“N+0” network comprising one or more amplifiers in the network path. The wireline communication network 500 comprises a remote PHY (RPHY) circuit 502 and an FDX amplifier network circuit 504. The FDX amplifier network circuit 504 comprises a first branch 504a configured to be coupled to the RPHY circuit 502 and convey data signals between the RPHY circuit 502 and one or more cable modems (CMs) coupled to the first branch 504a. The FDX amplifier network circuit 504 further comprises a second branch 504b configured to be coupled to the RPHY circuit 502 and convey data signals between the RPHY circuit 502 and one or more cable modems (CMs) coupled to the second branch 504b. In this embodiment, the FDX amplifier network circuit 504 is shown to include only 2 branches, however, in other embodiments, FDX amplifier network circuit 504 may include any number of branches.

[0058] In some embodiments, the first branch 504a comprises a first set of FDX trunk amplifier circuits. In particular, in this embodiment, the first branch 504a comprises a first FDX trunk amplifier circuit 506a and a second FDX trunk amplifier circuit 506b (N+2 configuration). However, in other embodiments, the first branch 504a may comprise any number of FDX amplifier circuits. In some embodiments, the second branch 504b comprises a second set of FDX trunk amplifier circuits. In particular, in this

embodiment, the second branch 504b comprises a third FDX trunk amplifier circuit 508. However, in other embodiments, the second branch 504b may comprise any number of FDX amplifier circuits. In some embodiments, the FDX trunk amplifier circuits 506a, 506b and 508 are implemented as the FDX trunk amplifier circuits explained above with respect to Fig. 1 , Fig. 2, Fig. 3a or Fig. 4 above, and therefore all the features applicable to the FDX trunk amplifier circuits in Fig. 1 , Fig. 2, Fig. 3a and Fig. 4 are also applicable to the FDX trunk amplifier circuits in Fig. 5. In some embodiments, each of the FDX trunk amplifier circuits 506a, 506b and 508 is associated with a predefined control group indicative of a control setting utilized to decode a filter control signal (e.g., the filter control signal 1 19 in Fig. 1 ) associated with the RPHY circuit 502, in order to generate a switching control signal (e.g., the switching control signal 120 in Fig. 1 ) to be utilized to configure the FDX trunk amplifier circuit, as explained above with respect to Fig. 1 .

[0059] In some embodiments, a position of the FDX trunk amplifier circuits in the network will affect the network functionality. All CMs behind an FDX trunk amplifier circuit will have to share the same RBA allocation and therefore, in some embodiments, the FDX trunk amplifier circuits associated with the same branch are assigned the same control group (e.g., control group 2 for the first branch 504a and control group 1 for the second branch 504b). Therefore, in some embodiments, each of the first set of FDX trunk amplifier circuits (e.g., the FDX trunk amplifier circuits 506a, 506b) associated with the first branch 504a comprises a first control group associated therewith and each of the second set of FDX trunk amplifier circuits (e.g., the FDX trunk amplifier circuit 508), associated with the second branch 504b comprises a second control group associated therewith. In some embodiments, the FDX amplifier network circuit 504 may be implemented as a single chip. However, in other embodiments, FDX amplifier network circuit 504 may be implemented in one or more chips or integrated circuits. In some embodiments, the first control group and the second control group are different.

However, in other embodiments, the first control group and the second control group may be the same.

[0060] Fig. 6 illustrates a flow chart of a method 600 for a full duplex (FDX) trunk amplifier circuit, according to one embodiment of the disclosure. In some embodiments, the method 600 is applicable to the FDX trunk amplifier circuit 104 in Fig. 1 , the FDX trunk amplifier circuit 200 in Fig. 2, the FDX trunk amplifier circuit 300 in Fig. 3a and the FDX trunk amplifier circuit 400 in Fig. 4. Therefore, the method 600 is explained herein with reference to the FDX trunk amplifier circuit 104 in Fig. 1 , the FDX trunk amplifier circuit 200 in Fig. 2, the FDX trunk amplifier circuit 300 in Fig. 3a and the FDX trunk amplifier circuit 400 in Fig. 4. At 602, an amplifier circuit (e.g., the amplifier circuit 1 12 in Fig. 1 ) configured to convey/amplify a downstream transmission of a downstream data signal associated with the RPHY circuit in a FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs in the FDX frequency band, based on a filter control signal (e.g., the filter control signal 1 19 in Fig. 1 ) associated with a RPHY circuit (e.g., the RPHY circuit 102 in Fig. 1 ), is provided. In some embodiments, the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band are conveyed at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0061] At 604, a filter circuit (e.g., the filter circuit 1 10b in Fig. 1 ) configured to couple to the amplifier circuit, based on the filter control signal, is provided. In some

embodiments, the filter circuit is further configured to provide the downstream

transmission of the downstream data signal in the predefined FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more

CMs in the predefined FDX frequency band, to the amplifier circuit. In one embodiment, the filter circuit comprises a first diplexer circuit (e.g., the filters 304a, 304b, 306a and

306b in Fig. 3a) configured to provide the downstream transmission of the downstream data signal in the FDX frequency band, to the amplifier circuit, based on the filter control signal and a second, different, diplexer circuit (e.g., the filters 308a, 308b, 310a and

310b in Fig. 3a) configured to provide the upstream transmission of the upstream data signal in the FDX frequency band, to the amplifier circuit, based on the filter control signal. In another alternate embodiment, the filter circuit comprises a triplexer circuit comprising a downstream non-FDX filter circuit (e.g., the filters 408a and 408b in Fig. 4) configured to provide a downstream transmission of a downstream data signal associated with the RPHY circuit in a first predefined non-FDX frequency band to the amplifier circuit and an upstream non-FDX filter circuit (e.g., the filters 412a and 412b in

Fig. 4) configured to provide an upstream transmission of an upstream data signal associated with the one or more CMs in a second, different, predefined non-FDX frequency band to the amplifier circuit. Further, the triplexer circuit comprises an FDX filter circuit (e.g., the filters 410a and 410b in Fig. 4) configured to provide the

downstream transmission of the downstream data signal in the FDX frequency band associated with the RPHY circuit and the upstream transmission of the upstream data signal in the FDX frequency band associated with the one or more CMs, to the amplifier circuit, based on the filter control signal. In some embodiments, the passband frequency of the FDX filter circuit overlaps with the FDX frequency band. However, other implementations of the filter circuit are also contemplated to be within the scope of this disclosure.

[0062] At 606, a switching circuit (e.g., the switching circuit 1 10a in Fig. 1 ) configured to couple the filter circuit to the amplifier circuit, based on the filter control signal, in order to enable the filter circuit to provide the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band, to the amplifier circuit, at different instances, is provided. At 608, a filter control circuit (e.g., the filter control circuit 1 14 in Fig. 1 ) configured to receive the filter control signal and decode the filter control signal to generate a switching control signal (e.g., the switching control signal 120 in Fig. 1 ) based thereon, in order to control the switching circuit, is provided. In some embodiments, the filter control signal comprises a DC control signal (e.g., the DC control signal 219 in Fig. 2).

[0063] Fig. 7 illustrates a flow chart of a method 700 for a remote PHY (RPHY) circuit, according to one embodiment of the disclosure. In some embodiments, the method 700 is applicable to the RPHY circuit 102 in Fig. 1 and the RPHY circuit 202 in Fig. 2.

Therefore, the method 700 is explained herein with reference to the RPHY circuit 102 in Fig. 1 and the RPHY circuit 202 in Fig. 2. However, in other embodiments, the method 700 may be applicable to any RPHY circuit. At 702, a filter control signal (e.g., the filter control signal 1 19 in Fig. 1 ) is provided from a control signal driver circuit (e.g., the control signal driver circuit 124 in Fig. 1 ) associated with an RPHY circuit (e.g., the RPHY circuit 102 in Fig. 1 ) to a FDX trunk amplifier circuit (e.g., the FDX trunk amplifier circuit 104 in Fig. 1 ), in order to configure the FDX trunk amplifier circuit to enable a downstream transmission of a downstream data signal associated with the RPHY circuit to the one or more CMs in an FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band. In some embodiments, the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band are enabled at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap. In some embodiments, a predefined parameter (e.g., a voltage level) associated with the filter control signal is indicative of a configuration associated with the FDX trunk amplifier circuit.

[0064] At 704, the filter control signal is generated at a signal processing circuit (e.g., the signal processing circuit 122 in Fig. 1 ) associated with the RPHY circuit, based on a required resource block allocation (RBA). In some embodiments, the filter control signal is generated at a signal processing circuit, prior to providing the filter control signal from the control signal driver circuit to the FDX trunk amplifier circuit. At 706, the required RBA is determined at the signal processing circuit, prior to generating the filter control signal. In some embodiments, the required RBA comprises scheduling the downstream transmission of the downstream data signal associated with the RPHY circuit to the one or more CMs in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band, at different instances.

[0065] While the apparatus has been illustrated and described with respect to one or more implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the

appended claims. In particular regard to the various functions performed by the above described components or structures (assemblies, devices, circuits,

systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally

equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention.

[0066] In particular regard to the various functions performed by the above

described components (assemblies, devices, circuits, systems, etc.), the terms

(including a reference to a "means") used to describe such components are

intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the disclosure. In addition, while a particular feature may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application.

[0067] While the invention has been illustrated, and described with respect to one or more implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular regard to the various functions performed by the above described components or structures (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the invention.

[0068] Examples can include subject matter such as a method, means for performing acts or blocks of the method, at least one machine-readable medium including instructions that, when performed by a machine cause the machine to perform acts of the method or of an apparatus or system for concurrent communication using multiple communication technologies according to embodiments and examples described herein.

[0069] Example 1 is a full duplex (FDX) trunk amplifier circuit configured to be coupled between a remote PHY (RPHY) circuit and one or more cable modems (CMs) associated with a wireline communication system, the FDX trunk amplifier circuit comprising a trunk amplifier circuit comprising an amplifier circuit configured to convey a downstream transmission of a downstream data signal associated with the RPHY circuit in an FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs in the FDX frequency band, based on a filter control signal associated with the RPHY circuit; wherein the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band are conveyed at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0070] Example 2 is an FDX trunk amplifier circuit, including the subject matter of example 1 , wherein the trunk amplifier circuit further comprises a switched filter circuit comprising a filter circuit configured to be coupled to the amplifier circuit, based on the filter control signal, and wherein the filter circuit is configured to provide the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band, to the amplifier circuit, at the different instances.

[0071] Example 3 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -2, including or omitting elements, wherein the switched filter circuit further comprises a switching circuit configured to couple the filter circuit to the amplifier circuit, based on the filter control signal, in order to enable the filter circuit to provide the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band, to the amplifier circuit, at the different instances.

[0072] Example 4 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -3, including or omitting elements, wherein the amplifier circuit comprises a downstream FDX amplifier circuit configured to amplify the downstream transmission signal in the FDX frequency band; and an upstream FDX amplifier circuit configured to amplify the upstream transmission signal in the FDX frequency band.

[0073] Example 5 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -4, including or omitting elements, further comprising a filter control circuit comprising a control block circuit configured to receive the filter control signal associated with the RPHY circuit; and a control signal decoder circuit configured to decode the filter control signal and generate a switching control signal based thereon, in order to control the switching circuit. [0074] Example 6 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -5, including or omitting elements, wherein the filter circuit comprises a first diplexer circuit configured to provide the downstream transmission of the downstream data signal in the FDX frequency band, to the downstream FDX amplifier circuit, based on the filter control signal; and a second, different, diplexer circuit configured to provide the upstream transmission of the upstream data signal in the FDX frequency band, to the upstream FDX amplifier circuit, based on the filter control signal.

[0075] Example 7 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -6, including or omitting elements, wherein the first diplexer circuit comprises a first downstream filter circuit configured to be coupled to the downstream FDX amplifier circuit and a first upstream filter circuit configured to be coupled to the upstream FDX amplifier circuit, based on the filter control signal, in order to provide the downstream transmission of the downstream data signal in the FDX frequency band to the downstream FDX amplifier circuit, wherein a passband frequency of the first downstream filter circuit is configured to overlap with the FDX frequency band.

[0076] Example 8 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -7, including or omitting elements, wherein the second diplexer circuit comprises a second downstream filter circuit configured to be coupled to the downstream FDX amplifier circuit and a second upstream filter circuit configured to be coupled to the upstream FDX amplifier circuit, based on the filter control signal, in order to provide the upstream transmission of the upstream data signal in the FDX frequency band to the upstream FDX amplifier circuit, wherein a passband frequency of the second upstream filter circuit is configured to overlap with the FDX frequency band.

[0077] Example 9 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -8, including or omitting elements, wherein the switching circuit is configured to be switched, based on the filter control signal, to couple the first downstream filter circuit to the downstream FDX amplifier circuit, in order to provide the downstream transmission of the downstream data signal in the FDX frequency band to the downstream FDX amplifier circuit; and couple the second upstream filter circuit to the upstream FDX amplifier circuit, in order to provide the upstream transmission of the upstream data signal in the FDX frequency band, at the different instances.

[0078] Example 10 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -9, including or omitting elements, wherein the filter circuit comprises a triplexer circuit comprising a downstream non-FDX filter circuit configured to provide a downstream transmission of a downstream data signal associated with the RPHY circuit in a first predefined non-FDX frequency band; an upstream non-FDX filter circuit configured to enable an upstream transmission of an upstream data signal associated with the one or more CMs in a second, different, predefined non-FDX frequency band; and an FDX filter circuit configured to provide the downstream transmission of the downstream data signal in the FDX frequency band associated with the RPHY circuit to the downstream FDX amplifier circuit and the upstream transmission of the upstream data signal in the FDX frequency band associated with the one or more CMs to the upstream FDX amplifier circuit, based on the filter control signal, wherein the passband frequency of the FDX filter circuit overlaps with the FDX frequency band.

[0079] Example 1 1 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -10, including or omitting elements, wherein the switching circuit is configured to be switched, based on the filter control signal, to couple the FDX filter circuit to the downstream FDX amplifier circuit, in order to provide the downstream transmission of the downstream data signal associated with the RPHY circuit in the FDX frequency band to the downstream FDX amplifier circuit, and couple the FDX filter circuit to the upstream FDX amplifier circuit, in order to provide the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band to the upstream FDX amplifier circuit, at the different instances.

[0080] Example 12 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -1 1 , including or omitting elements, wherein the control block circuit is configured to receive the filter control signal from the RPHY circuit or from a further FDX trunk amplifier circuit coupled between the RPHY circuit and the control block circuit.

[0081] Example 13 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -12, including or omitting elements, wherein the control block circuit is further configured to forward/couple the filter control signal associated with the RPHY circuit to further trunk amplifier circuits.

[0082] Example 14 is an FDX trunk amplifier circuit, including the subject matter of examples 1 -13, including or omitting elements, wherein the filter control signal comprises a direct current (DC) control signal.

[0083] Example 15 is a remote PHY (RPHY) circuit configured to interface with an FDX trunk amplifier circuit, the RPHY circuit comprising a control signal driver circuit configured to provide a filter control signal to the FDX trunk amplifier circuit, wherein the filter control signal is configured to configure the FDX trunk amplifier circuit to enable a downstream transmission of a downstream data signal associated with the RPHY circuit to the one or more CMs in a FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band, at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap; wherein a predefined parameter associated with the filter control signal is indicative of a configuration associated with the FDX trunk amplifier circuit.

[0084] Example 16 is an RPHY circuit, including the subject matter of example 15, wherein a value of the predefined parameter of the filter control signal is set based on a required resource block allocation (RBA).

[0085] Example 17 is an RPHY circuit, including the subject matter of examples 15-16, including or omitting elements, wherein the required RBA comprises setting the FDX band for downstream transmission at one instance and setting the FDX band for upstream transmission at a second, different, instance. [0086] Example 18 is an RPHY circuit, including the subject matter of examples 15-17, including or omitting elements, further comprising a signal processing circuit configured to generate the filter control signal based on the required RBA.

[0087] Example 19 is an RPHY circuit, including the subject matter of examples 15-18, including or omitting elements, wherein the signal processing circuit is further configured to determine the RBA comprising scheduling the downstream transmission of the downstream data signal associated with the RPHY circuit to the one or more CMs in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band, at different instances, in a way that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band do not overlap.

[0088] Example 20 is an RPHY circuit, including the subject matter of examples 15-19, including or omitting elements, wherein the filter control signal comprises a DC control signal.

[0089] Example 21 is an RPHY circuit, including the subject matter of examples 15-20, including or omitting elements, wherein the value of the predefined parameter associated with the filter control signal comprises a first parameter value indicative of a first predefined configuration of the FDX trunk amplifier circuit that enables the downstream transmission of the downstream data signal associated with the RPHY circuit to the one or more CMs in the FDX frequency band, and a second parameter value indicative of a second, different, predefined configuration of the FDX trunk amplifier circuit that enables the upstream transmission of the upstream data signal associated with the one or more CMs to the RPHY circuit in the FDX frequency band.

[0090] Example 22 is a full duplex (FDX) amplifier network circuit, comprising one or more branches configured to couple to a remote PHY (RPHY) circuit, each branch comprising one or more FDX trunk amplifier circuits coupled to one another, each of the FDX trunk amplifier circuit comprising a trunk amplifier circuit comprising an amplifier circuit configured to convey a downstream transmission of a downstream data signal associated with the RPHY circuit in an FDX frequency band and an upstream transmission of an upstream data signal associated with the one or more CMs in the FDX frequency band, based on a filter control signal associated with the RPHY circuit; wherein the downstream transmission of the downstream data signal in the FDX frequency band and the upstream

transmission of the upstream data signal in the FDX frequency band are conveyed at different instances, such that the downstream transmission of the downstream data signal in the FDX frequency band and the upstream

transmission of the upstream data signal in the FDX frequency band do not overlap.

[0091] Example 23 is an FDX amplifier network circuit, including the subject matter of example 22, wherein the trunk amplifier circuit further comprises a switched filter circuit comprising a filter circuit configured to be coupled to the amplifier circuit, based on the filter control signal, and wherein the filter circuit is configured to provide the downstream transmission of the downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal in the FDX frequency band, to the amplifier circuit, at the different instances.

[0092] Example 24 is an FDX amplifier network circuit, including the subject matter of examples 22-23, including or omitting elements, wherein the switched filter circuit further comprises a switching circuit configured to couple the filter circuit to the amplifier circuit, based on the filter control signal, in order to enable the filter circuit to provide the downstream transmission of a downstream data signal in the FDX frequency band and the upstream transmission of the upstream data signal associated with the one or more CMs in the FDX frequency band, to the amplifier circuit, at the different instances.

[0093] Example 25 is an FDX amplifier network circuit, including the subject matter of examples 22-24, including or omitting elements, wherein each of the FDX trunk amplifier circuit further comprises a filter control circuit comprising a control block circuit configured to receive a filter control signal associated with the RPHY circuit; and a control signal decoder circuit configured to decode the filter control signal and generate the switching control signal based thereon, to control the switching circuit.

[0094] Example 26 is an FDX amplifier network circuit, including the subject matter of examples 22-25, including or omitting elements, wherein the one or more branches comprises a first branch comprising a first set of FDX trunk amplifier circuits, each of the first set of FDX trunk amplifier circuits comprising a first control group associated therewith; and a second branch comprising a second, different, set of FDX trunk amplifier circuits, each of the second set of FDX trunk amplifier circuits comprising a second control group associated therewith; wherein the first control group and the second control group are indicative of a control setting utilized to decode the filter control signal for the first set of FDX trunk amplifier circuits and the second set of FDX trunk amplifier circuits, respectively, in order to generate the respective switching control signal.

[0095] Example 27 is an FDX amplifier network circuit, including the subject matter of examples 22-26, including or omitting elements, wherein the first control group and the second control group are different.

[0096] Various illustrative logics, logical blocks, modules, and circuits described in connection with aspects disclosed herein can be implemented or performed with a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform functions described herein. A general-purpose processor can be a microprocessor, but, in the alternative, processor can be any conventional processor, controller, microcontroller, or state machine.

[0097] The above description of illustrated embodiments of the subject disclosure, including what is described in the Abstract, is not intended to be exhaustive or to limit the disclosed embodiments to the precise forms disclosed. While specific embodiments and examples are described herein for illustrative purposes, various modifications are possible that are considered within the scope of such embodiments and examples, as those skilled in the relevant art can recognize.

[0098] In this regard, while the disclosed subject matter has been described in connection with various embodiments and corresponding Figures, where applicable, it is to be understood that other similar embodiments can be used or modifications and additions can be made to the described embodiments for performing the same, similar, alternative, or substitute function of the disclosed subject matter without deviating therefrom. Therefore, the disclosed subject matter should not be limited to any single embodiment described herein, but rather should be construed in breadth and scope in accordance with the appended claims below.

[0099] In particular regard to the various functions performed by the above described components (assemblies, devices, circuits, systems, etc.), the terms (including a reference to a "means") used to describe such components are intended to correspond, unless otherwise indicated, to any component or structure which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure which performs the function in the herein illustrated exemplary implementations of the disclosure. In addition, while a particular feature may have been disclosed with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application.