Title:
SURFACE CAPACITANCE SENSOR SYSTEM USING BURIED STIMULUS ELECTRODE
Document Type and Number:
WIPO Patent Application WO2002095439
Kind Code:
A3
Abstract:
A surface capacitance sensor system is implemented as an array of sensor electrodes (21-23, 31-33, 41-43) near the surface of the integrated circuit and an array of stimulus electrodes below the sensor electrodes. Rows of stimulus electrodes are driven by sources (12, 13) while the voltages at the respective sensor electrodes are measured. Voltage measurements (16) at each sensor electrode allow the surface capacitance at each sensor electrode location to be determined. The capacitance data is used to determine the positions of target electrodes above the array surface as required in the location fingerprint artifacts.
More Like This:
Inventors:
ANDRADE THOMAS L (US)
Application Number:
PCT/US2002/016533
Publication Date:
May 01, 2003
Filing Date:
May 22, 2002
Export Citation:
Assignee:
SILABLE INC (US)
ANDRADE THOMAS L (US)
ANDRADE THOMAS L (US)
International Classes:
G06K9/00; G01B7/28; (IPC1-7): G01R27/02; G01R27/26
Foreign References:
US5869791A | 1999-02-09 | |||
US6289114B1 | 2001-09-11 | |||
US6191593B1 | 2001-02-20 | |||
US6317508B1 | 2001-11-13 |
Other References:
See also references of EP 1412765A4
Download PDF:
Previous Patent: A DURABLE GLOBAL ASSET-TRACKING DEVICE AND A METHOD OF USING THE SAME
Next Patent: CLOSED LOOP POWER MANAGEMENT FOR RADAR BASED SYSTEM
Next Patent: CLOSED LOOP POWER MANAGEMENT FOR RADAR BASED SYSTEM