SURFACE-PROTECTING SHEET AND SEMICONDUCTOR WAFER LAPPING METHOD

Title:

SURFACE-PROTECTING SHEET AND SEMICONDUCTOR WAFER LAPPING METHOD

Document Type and Number:

WIPO Patent Application WO/2005/038894

Kind Code:

A1

Abstract:

A surface-protecting sheet not producing any dimple when a wafer is lapped to an extremely small thickness, nor causing damage to and contamination of the wafer where even high bumps are arranged at high density, nor leaving any adhesive on the root portions of the bumps after the sheet is peeled. A method for lapping a semiconductor wafer is also disclosed. The surface-protecting sheet is used for lapping the back of a semiconductor wafer and is characterized in that one side of a base sheet of the surface-protecting sheet has an opening portion having a diameter smaller than that of the semiconductor wafer to which the surface-protecting sheet is stuck and a portion which is provided around the opening portion and on which an adhesive layer is formed.

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Inventors:

NAGAMOTO KOICHI (JP)
OHASHI HITOSHI (JP)
TAKAHASHI KAZUHIRO (JP)

Application Number:

PCT/JP2004/015131

Publication Date:

April 28, 2005

Filing Date:

October 14, 2004

Export Citation:

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Assignee:

LINTEC CORP (JP)
NAGAMOTO KOICHI (JP)
OHASHI HITOSHI (JP)
TAKAHASHI KAZUHIRO (JP)

International Classes:

C09J7/20; C09J201/00; H01L21/304; H01L21/68; (IPC1-7): H01L21/304

Foreign References:

JPH0228924A	1990-01-31
JPH0562950A	1993-03-12
JP2003051473A	2003-02-21
JP2004288725A	2004-10-14

Other References: