Title:
SURGE PROTECTING SEMICONDUCTOR DEVICE
Document Type and Number:
WIPO Patent Application WO/2003/041236
Kind Code:
A1
Abstract:
Two buried structure type pnpn thyristors (Thy1, Thy2) and four pn diodes (D1, D2, D3, D4) are formed in a first conductivity type semiconductor substrate by the thermal diffusion process. Each constituent section is separated into five regions (Thy1 region, Thy2 region, D1.D2 region, D3 region, D4 region). A balance type surge protecting circuit is made monolithic on the substrate by surface metal wirings to constitute a surge protecting semiconductor device.
Inventors:
OKA RITSUO (JP)
Application Number:
PCT/JP2002/011579
Publication Date:
May 15, 2003
Filing Date:
November 06, 2002
Export Citation:
Assignee:
SHINDENGEN ELECTRIC MFG (JP)
OKA RITSUO (JP)
OKA RITSUO (JP)
International Classes:
H01L27/02; H01L29/74; (IPC1-7): H02H9/04; H01L29/74
Foreign References:
| JPH0536979A | 1993-02-12 | |||
| US5532900A | 1996-07-02 | |||
| JPS5821354A | 1983-02-08 | |||
| US6049096A | 2000-04-11 | |||
| US4992844A | 1991-02-12 | |||
| US5781392A | 1998-07-14 |
Attorney, Agent or Firm:
Suzuye, Takehiko c/o SUZUYE & SUZUYE 7-2 (Kasumigaseki 3-chome Chiyoda-ku, Tokyo, JP)
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