SWITCHING CIRCUIT

WIPO Patent Application WO/2012/169272

A1

A switching circuit (10A) according to one embodiment comprises first to fourth semiconductor switch elements (20) each having an input terminal (21), an output terminal (22), and a common terminal (23). A pulse-form signal is applied to the input terminal of each semiconductor switch element in a manner such that, when the first and fourth semiconductor switch elements are ON (or OFF), the remaining semiconductor switch elements are OFF (or ON). The switching circuit includes: a first capacitance element (60) connected between the output terminal of the second semiconductor switch element and the input terminal of the fourth semiconductor switch element; and a second capacitance element (61) connected between the input terminal of the second semiconductor switch element and the output terminal of the fourth semiconductor switch element. Each of the first and second capacitance elements has a capacitance that reduces the parasitic capacitance between the input terminal and the output terminal of the respective fourth and second semiconductor switch elements at a frequency that is N times the clock frequency of the pulse-form signal supplied to the respective fourth and second semiconductor switch elements (N is an integer of 1 or greater).

FUJIKAWA KAZUHIRO (JP)
SHIGA NOBUO (JP)
OHIRA TAKASHI (JP)
WADA KAZUYUKI (JP)
ISHIOKA KAZUYA (JP)

PCT/JP2012/058996

December 13, 2012

April 02, 2012

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SUMITOMO ELECTRIC INDUSTRIES (JP)
NAT UNIV CORP TOYOHASHI UNIV (JP)
FUJIKAWA KAZUHIRO (JP)
SHIGA NOBUO (JP)
OHIRA TAKASHI (JP)
WADA KAZUYUKI (JP)
ISHIOKA KAZUYA (JP)

H03K17/04; H03K17/687

JPH0567957A	1993-03-19
JPH11149605A	1999-06-02
JP2010028522A	2010-02-04
JPH0747993A	1995-02-21

HASEGAWA Yoshiki et al. (JP)
Yoshiki Hasegawa (JP)

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