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Patent Searching and Data

Document Type and Number:
WIPO Patent Application WO/2018/043039
Kind Code:
Provided is a switching circuit that is constituted by a driving power supply (1), a driving circuit (3), a first transistor (4), and a second transistor (5), wherein the first and second transistors (4) and (5) respectively have gate terminals (G1) and (G2), drain terminals (D1) and (D2), and first source terminals (S1) and (S2) and second source terminals (SS1) and (SS2) through which main current passes, the second source terminals (SS1) and (SS2) are connected at a connection portion between the negative electrode terminal of the driving power supply (1) and the ground terminal of the driving circuit (3), so that the influence of the main current on each of the gate driving paths of the first and second transistors (4) and (5) is eliminated, and the gate driving paths are separated, so that the main current can be balanced by equalizing parasitic impedance.

UEHARA Takahiro
ISHII Takuya
HANDA Hiroyuki
TANAKA Takeshi
Application Number:
Publication Date:
March 08, 2018
Filing Date:
August 07, 2017
Export Citation:
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PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. (1-61, Shiromi 2-chome Chuo-ku, Osaka-sh, Osaka 07, 〒5406207, JP)
International Classes:
H02M1/08; H03K17/12
Attorney, Agent or Firm:
KAMATA Kenji et al. (1-61, Shiromi 2-chome, Chuo-ku, Osaka-sh, Osaka 07, 〒5406207, JP)
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