Title:
SWITCHING DEVICE CIRCUIT, SWITCHING SYSTEM, AND SWITCHING DEVICE PROCESSING METHOD
Document Type and Number:
WIPO Patent Application WO/2021/246044
Kind Code:
A1
Abstract:
The present invention suppresses power loss of a switching device. This switching device circuit (20) is used in a switching device (10). The switching device (10) comprises a first path (11) and a second path (12). The first path (11) includes a first field effect transistor (Q1) and a first inductor (L1). The second path (12) includes a second field effect transistor (Q2) and a second inductor (L2). The first path (11) and the second path (12) are connected in parallel with respect to a power supply (Vdc). A first maximum current, which is the maximum current when the first field effect transistor (Q1) is conductive, is smaller than a second maximum current, which is the maximum current when the second field effect transistor (Q2) is conductive. The switching device circuit (20) is provided with a processing unit (26). The processing unit (26) executes a specific operation according to the voltage difference between a voltage (VL1) between two ends of the first inductor (L1) and the voltage between two ends of the second inductor (VL2).
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Inventors:
KINOSHITA YUSUKE
NAGATOMI YUTA
MAEDA RYOSUKE
NAKAZAWA SATOSHI
NAGATOMI YUTA
MAEDA RYOSUKE
NAKAZAWA SATOSHI
Application Number:
PCT/JP2021/014457
Publication Date:
December 09, 2021
Filing Date:
April 05, 2021
Export Citation:
Assignee:
PANASONIC IP MAN CO LTD (JP)
International Classes:
H02H3/02; H02H3/05; H02H3/087; H02J1/00; H03K17/08
Foreign References:
| JP2008236846A | 2008-10-02 | |||
| JP2000299931A | 2000-10-24 |
Attorney, Agent or Firm:
KAMATA Kenji et al. (JP)
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