YE, Wenhui (No. 3009, BYD Road Pingsha, Shenzhen Guangdong 8, 518118, CN)
YANG, Xiaohua (No. 3009, BYD Road Pingsha, Shenzhen Guangdong 8, 518118, CN)
YE, Wenhui (No. 3009, BYD Road Pingsha, Shenzhen Guangdong 8, 518118, CN)
| WHAT IS CLAIMED IS: 1. A switch power supply controlling circuit for controlling an output voltage of a main circuit of a switch power supply, comprising: a switching status selecting unit, configured to generate a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit, ; a reference voltage generating unit, connected with the switching status selecting unit, and configured to output a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal; a first comparator, connected with the reference voltage generating unit, and configured to output a PMW controlling signal according to the reference voltage and a current feedback signal reflecting a current change of the main circuit; a PFM controlling unit, connected with the switching status selecting unit, and configured to output a PFM controlling signal with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal; a logic unit, connected with the first comparator and the PFM controlling unit respectively, and configured to output a switching controlling signal according to the PMW controlling signal and the PFM controlling signal; and a driving unit, connected with the logic unit, and configured to control a power switch of the main circuit to switch on or switch off to stabilize the output voltage of the main circuit according to the switching controlling signal. 2. The switch power supply controlling circuit of claim 1, wherein the switching status selecting unit comprise: an enable unit, configured to generate an enable signal according to the voltage feedback signal; an encoder, connected with the enable unit and configured to select and output a status according to the enable signal, the status being selected from a plurality of statuses corresponding to the voltage output statuses and the frequency output statuses respectively; and a decoder, connected to the encoder and configured to convert the status selected and output by the encoder to the switching status selecting signal. 3. The switch power supply controlling circuit of claim 2, wherein the encoder is a reversible counter; the statuses are count values of the reversible counter; the count values in a small to large order correspond to voltages of the voltage output statuses in a large to small order and the frequencies of the frequency output statuses in a large to small order; and the enable signal comprises: a count enable signal, configured to control the reversible counter to count up or down; and a reset enable signal, configured to control the reversible counter to jump to a minimum count value when the voltage of the voltage feedback signal is lower than the reference voltage. 4. The switch power supply controlling circuit of claim 3, wherein the switching status selecting unit further comprises an overflow protection unit, configured to control the reversible counter to maintain a maximum or minimum count value until the reversible counter changes a count direction when the reversible counter overflows. 5. The switch power supply controlling circuit of claim 3, wherein the switching status selecting unit further comprise an encoding maintaining unit, configured to maintain each status of the revisable counter for one or more switching cycle until the switching cycle ends or the reversible counter changes the count direction. 6. The switch power supply controlling circuit of claim 3, wherein the enable unit comprises: a second comparator, including: a positive input terminal connected to the reference voltage generating unit and configured to receive a first reference voltage, a negative input terminal configured to receive the voltage feedback signal and an output terminal connected to the encoder and configured to output the reset enable signal; and a third comparator, including: a negative input terminal connected to the reference voltage generating unit and configured to receive a second reference voltage, a positive input terminal configured to receive the voltage feedback signal and an output terminal connected to the encoder and configured to output the count enable signal. 7. The switch power supply controlling circuit of claim 1, wherein the PFM controlling unit comprises an inverter. 8. The switch power supply controlling circuit of claim 1, wherein the logic unit comprises a RS trigger including an R terminal connected to an output terminal of the first comparator, an S terminal connected to an output terminal of the PFM controlling unit and a Q terminal configured to output the switching controlling signal. 9. The switch power supply controlling circuit of claim 1, wherein the main circuit is an isolated power converting circuit or a non-isolated power converting circuit. 10. The switch power supply controlling circuit of claim 1, further comprising a first sampling unit, connected with the main circuit and configured to obtain the voltage feedback signal from the main circuit. 11. The switch power supply controlling circuit of claim 1, further comprising a second sampling unit, connected with the main circuit and configured to obtain the current feedback signal from the main circuit. 12. A switch power supply comprising the switch power supply controlling circuit of any one of claims 1 to 11. 13. A switch power supply controlling method for controlling an output voltage of a main circuit of a switch power supply, comprising the steps of: generating a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit; generating a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal; generating a PMW controlling signal according to the reference voltage and a current feedback signal reflecting a current change of the main circuit; generating a PFM controlling signal with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal; generating a switching controlling signal according to the PMW controlling signal and the PFM controlling signal; and switching on or switching off a power switch of the main circuit to stabilize the output voltage of the main circuit according to the switching controlling signal. 14. The method according to claim 13, wherein the step of generating a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit comprises the steps of: generating an enable signal according to the voltage feedback signal; selecting and outputting a status according to the enable signal, in which the statuses correspond to the voltage output statuses and the frequency output statuses respectively; and converting the status to the switching status selecting signal. 15. The method according to claim 14, wherein the statuses are count values and the count values in a small to large order correspond to voltages of the voltage output statuses in a large to small order and the frequencies of the frequency output statuses in a large to small order. 16. The method according to claim 15, further comprising a step of: maintaining a maximum or minimum count value when the count value reaches the maximum or minimum count value until changing a count direction. |
SWTICHING POWER SUPPLY
CROSS-REFERENCE TO RELATED APPLICATION
This application claims priority to, and benefits of Chinese Patent Application No. 201010218923.6, filed with the State Intellectual Property Office of P. R. C. on June 29, 2010, the entire contents of which are incorporated herein by reference.
FIELD
The present invention relates generally to a power supply controlling circuit, and more particularly to a switch power supply controlling circuit, a switch power supply having the same and a switch power supply controlling method.
BACKGROUND
At present, a portable electronic device usually uses a battery as a power supply device. When a battery power runs out, the electronic device needs to be charged by an adapter to ensure it may work properly. Because of a wide adaptive range and a high converting efficiency, a switch power supply has been widely applied to the portable electronic device.
The switch power supply usually works in two modes: a pulse width modulation (PWM) mode or a pulse frequency modulation (PFM) mode. The two modes are switched by a hybrid converter for the switch power supply. And the hybrid converter for the switch power supply is widely applied to the portable electronic device.
Under the PWM mode, the hybrid converter for the switch power supply works under a constant frequency and a PMW controlling unit adjusts a switch on duration of the power switch according to a load condition. Usually, under the PFM mode, the hybrid converter for the switch power supply has a strong load capacity and may output an output voltage with small ripple and constant frequency. In a heavy load condition, a high efficiency is obtained. However, in a light load condition, a fixed switching loss of the hybrid converter for the switch power supply makes the efficiency decease.
Under the PFM mode, the frequency of the hybrid converter changes according to the load condition. In a light load condition, the frequency decreases and makes the switching loss decrease, so the hybrid converter may obtain a high efficiency under the light load.
As above mentioned, if the hybrid converter for the switch power supply works in the PWM mode and PFM mode and may switch automatically between two modes according to the load condition, the hybrid converter may remain a high efficiency, so the efficiency of the power supply is increased and the battery endurance is prolonged. Nowadays the hybrid converter that may switch between the two modes automatically needs an automatic conversion controlling circuit, a PWM circuit and a PFM circuit. The automatic conversion controlling circuit controls to switch between the PWM circuit and the PFM circuit according to practice so that the main circuit of the power supply may output a stable voltage. However, the automatic conversion controlling circuit is complicated and difficult to be realized.
SUMMARY
The present disclosure is aimed to solve at least one of the above mentioned technical problems.
According to one aspect of the invention, a switch power supply controlling circuit is provided. The switch power supply controlling circuit for controlling an output voltage of a main circuit of the switch power supply, comprising: a switching status selecting unit, configured to generate a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit; a reference voltage generating unit, connected with the switching status selecting unit, and configured to output a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal; a first comparator, connected with the reference voltage generating unit, and configured to output a PMW controlling signal according to the reference voltage and a current feedback signal reflecting a current change of the main circuit; a PFM controlling unit, connected with the switching status selecting unit, and configured to output a PFM controlling signal with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal; a logic unit, connected with the first comparator and the PFM controlling unit respectively, and configured to output a switching controlling signal according to the PMW controlling signal and the PFM controlling signal; and a driving unit, connected with the logic unit, and configured to control a power switch of the main circuit to switch on or switch off to stabilize the output voltage of the main circuit according to the switching controlling signal.
According to another aspect of the invention, switch power supply comprising the switch power supply controlling circuit mentioned above is provided.
According to another aspect of the invention, a switch power supply controlling method for controlling an output voltage of a main circuit of a switch power supply is provided. The method comprises the steps of: generating a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit; generating a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal; generating a PMW controlling signal according to the reference voltage and a current feedback signal reflecting a current change of the main circuit; generating a PFM controlling signal with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal; generating a switching controlling signal according to the PMW controlling signal and the PFM controlling signal; and switching on or switching off a power switch of the main circuit to stabilize the output voltage of the main circuit according to the switching controlling signal.
Additional aspects and advantages of the embodiments of the present disclosure will be given in part in the following descriptions, become apparent in part from the following descriptions, or be learned from the practice of the embodiments of the present disclosure.
BRIEF DESCRIPTION OF THE DRAWINGS
The foregoing summary, as well as the following detailed description of the invention, will be better understood when read in conjunction with the appended drawings. The embodiments illustrated in the figures of the accompanying drawings herein are by way of example and not by way of limitation. In the drawings:
Fig. 1 is a schematic block diagram showing a switch power supply controlling circuit according to one exemplary embodiment of the present invention;
Fig. 2 is a schematic diagram showing a relationship between a switching on duration and a frequency of a switching controlling signal according to one exemplary embodiment of the present invention;
Fig. 3 is a schematic block diagram of a switching status selecting unit according to one exemplary embodiment of the present invention;
Fig. 4 is a diagram showing a status of an encoder of the switching status selecting unit according to one exemplary embodiment of the present invention;
Fig. 5 is a schematic diagram showing a relationship between the status and the switching on duration of the switching controlling signal and between the status and the frequency of the switching controlling signal according to one exemplary embodiment of the present invention;
Fig. 6 is a schematic block diagram of a switching status selecting unit according to one exemplary embodiment of the present invention;
Fig. 7 is a schematic diagram of a switching status selecting unit according to one exemplary embodiment of the present invention;
Fig. 8 is a schematic diagram showing a connection between a PFM controlling unit, a reference voltage generating unit, a first comparator and a logic unit according to one exemplary embodiment of the present invention;
Fig. 9 is a schematic diagram showing a switch power supply according to one exemplary embodiment of the present invention;
Fig. 10 is a flow chart showing a switch power supply controlling method for controlling an output voltage of a main circuit of a switch power supply according to one exemplary embodiment of the present invention; and
Fig. 1 1 is a flow chart showing a work procedure of a switch power supply controlling circuit according to one exemplary embodiment of the present invention
DETAILED DESCRIPTION OF EMBODIMENTS OF THE DISCLOSURE
The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art.
Fig. 1 is a schematic block diagram showing a switch power supply controlling circuit 10 for controlling an output voltage of a main circuit 20 of the switch power supply. The switch power supply controlling circuit 10 comprises: a switching status selecting unit 30, configured to generate a switching status selecting signal according to a voltage feedback signal SI reflecting an voltage change of the main circuit 20; a reference voltage generating unit 40, connected with the switching status selecting unit 30, and configured to output a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal; a first comparator (CI) 50, connected with the reference voltage generating unit 40, and configured to output a PMW controlling signal according to the reference voltage and a current feedback signal S2 reflecting a current change of the main circuit 20; a PFM controlling unit 60, connected with the switching status selecting unit 30, and configured to output a PFM controlling signal specifying with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal; a logic unit 70, connected with the first comparator 50 and the PFM controlling unit 60 respectively, and configured to output a switching controlling signal according to the PMW controlling signal and the PFM controlling signal; and a driving unit 80, connected with the logic unit 70, and configured to control a power switch of the main circuit to switch on or switch off to stabilize the output voltage of the main circuit 20 according to the switching controlling signal.
Fig. 2 is a schematic diagram showing a relationship between a switching on duration and a frequency of a switching controlling signal according to one exemplary embodiment of the present invention.
As shown in Fig. 2, a left column represents a switch on duration of the switching controlling signal and a right column represents a frequency of the switching controlling signal. In this embodiment, each line represents a switching controlling signal. For example, a line of D_max and fsw_max corresponds to a switching controlling signal with a D_max switch on duration and a fsw_max frequency, which controls control the power switch to switch on or off at the frequency fsw_max in the D_max switch on duration. As shown in Fig. 2, the logic unit 70 may output ten switching controlling signals.
In some embodiment of the present invention, the reference voltage generating unit 40 comprises ten voltage output statues. Each voltage output status selected by the switching status selecting signal corresponds to one reference voltage. The first comparator 50 compares the reference voltage with the current feedback signal and outputs the PWM controlling signal that determines the switch on duration of the switching controlling signal. Thus, one reference voltage corresponds to a switching on duration of the switching controlling signal and ten reference voltages correspond to ten switching on durations of the switching controlling signal.
In some embodiment of the present invention, the PFM controlling unit 60 comprises 10 frequency output statuses. The PFM controlling unit 60 outputs a PFM controlling signal with a frequency according to a frequency output status selected by the switching status selecting signal. The PFM controlling signal determines the frequency of the switching controlling signal.
In Fig. 2, D max represents a maximum switch on duration and other switch on durations decrease with 10% each time to 0.1D_max; fsw_max represents a maximum frequency and other frequencies decrease with 10% each time to 0.1fsw_max. Values of D max and fsw_max may be determined according to different situations and a way of decreasing is not limited to an arithmetic sequence mode.
Fig. 3 shows a schematic block diagram of a switching status selecting unit according to one exemplary embodiment of the present invention. The status selecting unit 30 comprises: an enable unit 120, configured to generate an enable signal according to the voltage feedback signal; an encoder 130, connected with the enable unit 120 and configured to select and output a status according to the enable signal, in which the statuses correspond to the voltage output statuses and the frequency output statuses respectively; and a decoder 140, connected to the encoder 130 and configured to convert the status selected and output by the encoder 130 to the switching status selecting signal. In some embodiment of the present invention, the encoder 130 is a reversible counter and the enable signal comprises: a count enable signal configured to control the reversible counter to count up or down; and a reset enable signal configured to control the reversible counter to jump to a minimum count value when a voltage of the voltage feedback signal is lower than the reference voltage.
Fig. 4 is a diagram showing a status of an encoder of the switching status selecting unit according to one exemplary embodiment of the present invention. As shown in Fig. 4, the statuses are count values of the reversible counter. The count value comprises 10 four-digit binary numbers. In the embodiment, the decoder 140 is a 4-digit to 16-digit decoder.
Fig. 5 is a schematic diagram showing a relationship between the status and the switching on duration of the switching controlling signal and between the status and the frequency of the switching controlling signal according to one exemplary embodiment of the present invention. As shown in Fig. 5, the statuses correspond to the switching on durations and to the frequencies. The statuses are the count values of the reversible counter. Specifically, the count values in a small to large order correspond to voltages of the voltage output statuses in a large to small order and the frequencies of the frequency output statuses in a large to small order. For example, the minimum count value of the reversible counter 0000 corresponds to the maximum switching on duration D_max and the maximum frequency of the frequency output status fsw_max respectively; and the maximum count value of the reversible counter 1001 corresponds to the minimum switching on duration 0. ID max and the minimum frequency 0. lfsw max respectively.
Fig. 6 is a schematic block diagram of a switching status selecting unit according to one exemplary embodiment of the present invention. In some embodiment of the present invention, the encoder 130 is the revisable counter and the switching status selecting unit 30 further comprises an overflow protection unit 150, configured to control the reversible counter to maintain the maximum or minimum count value until the reversible counter changes the count direction when the reversible counter overflows. In some embodiment of the present invention, the switching status selecting unit 30 further comprises an encoding maintaining unit 160, configured to maintain each status of the revisable counter for one or more switching cycle until the switching cycle ends or the reversible counter changes the count direction.
Fig. 7 is a schematic diagram of a switching status selecting unit according to one exemplary embodiment of the present invention. As shown in Fig. 7, the enable unit 120 comprises a second comparator (C2) 121 configured to output the reset enable signal S3 and a third comparator (C3) 122 configured to output the count enable signal S4. A positive input terminal of the second comparator 121 is connected to the reference voltage generating unit 40 for receiving a first reference voltage Vrefl, a negative input terminal the second comparator 121 is for receiving the voltage feedback signal S I and an output terminal the second comparator 121 is connected to the encoder 130. A negative input terminal of the third comparator 122 is connected to the reference voltage generating unit 40 for receiving a second reference voltage Vref2, a positive input terminal of the third comparator 122 is for receiving the voltage feedback signal S I and an output terminal of the third comparator 122 is connected to the encoder 130. When the second comparator 121 outputs a high level voltage, the encoder 130 may be reset and may output the minimum count value; when the third comparator 122 outputs a high level voltage, the encoder 130 may increase by one; and when the third comparator 122 outputs a low level voltage, the encoder 130 may decreases by one.
Fig. 8 is a schematic diagram showing a connection between a PFM controlling unit, a reference voltage generating unit, a first comparator and a logic unit according to one exemplary embodiment of the present invention. The reference voltage generating unit 40 comprises a plurality of voltage output statuses. The voltage output statuses correspond to and are proportional to the switching on durations. The reference voltage generating unit 40 outputs a reference voltage according to the voltage output status selected by the switching status selecting signal. The first comparator (CI) 50 connected with the reference voltage generating unit 40 and the logic unit 70. A positive input terminal of the first comparator 50 is for receiving the current feedback signal S2, a negative input terminal of the first comparator 50 is connected with an output terminal of the reference voltage generating unit 40 and an output terminal of the first comparator 50 outputs a PMW controlling signal according to the reference voltage and the current feedback signal reflecting a current change of the main circuit 20. In some embodiment of the present invention, the reference voltage generating unit 40 comprises 10 voltage output statues corresponding to 10 four-digit binary numbers of the reversible counter, and as mentioned above, the decoder 140 converts the status selected and output by the encoder 130 (reversible counter) to the switching status selecting signal, so the reference voltage generating unit 40 may output 10 reference voltages according to the switching status selecting signal S5. In one embodiment, the reference voltage generating unit 40 comprises 10 voltage divider resistors and 10 voltage output switches and is connected to a system voltage. The decoder 140 is a 4-digit to 16-digit decoder. When the reversible counter outputs a count value, the decoder 140 converts the count value to 10 switching status selecting signals to control to switch on or off the 10 voltage outputs, and the reference voltage generating unit 40 may output a reference voltage. The first comparator 50 compares the reference voltage with the current feedback signal S2 and outputs a comparison result. Therefore, the first comparator 50 may output different comparison results according to a change of count values, and the PMW controlling signal is generated to determine the switching on duration of the switching controlling signal S8.
As shown in Fig. 8, the PFM controlling unit 60 comprises an inverter. The inverter is connected to the switching status selecting unit 30 and comprises a plurality of frequency output statuses. The inverter outputs a PFM controlling signal S6 with a frequency according to the frequency output status selected by the switching status selecting signal S5. In an instance, the inverter comprises a multi-path inverter and a square wave oscillator with a fixed frequency. The multi-path inverter is a 10-path inverter. The frequency output statuses are 10. Each frequency output status specifies a frequency. The frequencies of the frequency output statuses in an order from large to small correspond to the 10 4-digit binary numbers in an order from small to large. When the reversible counter outputs a count value, the decoder 140 converts the count value to 10 switching status selecting signals to control 10 paths of the multi-path inverter, and the square wave oscillator may output a square wave with a fixed frequency. The inverter may output different PFM controlling signals according to a change of count values to determine the frequency of the switching controlling signal S8.
Also as shown in Fig. 8, the logic unit 70 comprises an RS trigger. An R terminal of the RS trigger is connected to an output terminal of the first comparator 50, an S terminal of the RS trigger is connected to an output terminal of the PFM controlling unit 60 and a Q terminal of the RS trigger outputs a switching controlling signal.
Fig. 9 is a schematic diagram showing a switch power supply according to one exemplary embodiment of the present invention. The switch power supply 100 comprises the switch power supply controlling circuit 10 and the main circuit 20. In some embodiment of the present invention, the main circuit 20 is an isolated power converting circuit or a non-isolated power converting circuit. In one embodiment, the isolated power converting circuit comprises a transformer Lp, a power switch Ql, a diode D7, a capacitor C4 and a resistor R5. The transformer Lp comprises a primary coil A and a secondary coil B. As shown in Fig. 9, the switch power supply controlling circuit 10 further comprises a first sampling unit 90 and a second sampling unit 190. The first sampling unit 90 comprises an auxiliary coil C, resistors R6 and R7 and a sampling maintaining unit 91. The voltage feedback signal SI is obtained by being induced by the auxiliary coil, divided by R6 and R7 and rectified by the sampling maintaining unit 91. The voltage feedback signal SI may reflect the change of the main circuit 20. In some embodiment of the present invention, the first sampling circuit 90 is an optical coupler that feedbacks the output voltage of the main circuit 20 to the switch power supply controlling circuit 10. The second sampling unit 190 is the resistor R8.
Referring to FIGS. 1-9, the exemplary operation principle of exemplary embodiments of the present invention is described below. When the SMPS enters a stable voltage mode, the second comparator 121 compares the voltage feedback signal and the first reference voltage Vrefl, and the third comparator 122 compares the voltage feedback signal and the second reference voltage Vref2. The first reference voltage may be less than the second reference voltage. When the voltage feedback signal is larger than the second reference voltage, that is to say the output voltage of the main circuit 20 is high, the second comparator 121 outputs a count enable signal to the encoder 130. The count enable signal is high and may control the encoder to increase one based on the present count value. The decoder 140 then inverts the count value into the switching status selecting signal, and outputs the switching status selecting signal to the PFM controlling unit 60 and the reference voltage generating unit 40. The increased one count value corresponds to the decreased frequency output status of the PFM controlling unit 60.
The PFM controlling unit 60 outputs the decreased PFM controlling signal to the S terminal of the RS trigger, which leads the frequency of the switching controlling signal to decrease. Furthermore, the increased one count value corresponds to the decreased voltage output status of the reference voltage generating unit 40. The reference voltage generating unit 40 outputs the decreased voltage to the negative input terminal of the first comparator 50. The first comparator 50 compares the current feedback signal with the decreased the reference voltage, and outputs the PWM controlling signal to the R terminal of the RS trigger, which leads the switch-on duration of the switching controlling signal to decrease. And the decreased switching controlling signal may be obtained, so the switch-on duration and the frequency of the power switch are decreased to decrease the output voltage of the main circuit 20.
When the voltage feedback signal is less than the second reference voltage, that is to say the output voltage of the main circuit 20 is low, the second comparator 121 outputs a count enable signal to the encoder 130. The count enable signal is low and may control the encoder 130 to decrease one based on the present count value. The decoder 140 then inverts the count value into the switching status selecting signal, and outputs the switching status selecting signal to the PFM controlling unit 60 and the reference voltage generating unit 40. The decreased one count value corresponds to the increased frequency output status of the PFM controlling unit 60. The PFM controlling unit 60 outputs the decreased PFM controlling signal to the S terminal of the RS trigger, which leads the frequency of the switching controlling signal to increase. Furthermore, the decreased one count value corresponds to the increased voltage output status of the reference voltage generating unit 40. The reference voltage generating unit 40 outputs the increased voltage to the negative input terminal of the first comparator 50. The first comparator 50 compares the current feedback signal with the increased the reference voltage and outputs the PWM controlling signal to the R terminal of the RS trigger, which leads the switch-on duration of the switching controlling signal to increase. And the increased switching controlling signal may be obtained, so the switch-on on duration and the frequency of the power switch are increased to increase the output voltage of the main circuit 20.
In another instance, the voltage feedback signal is less than the first reference voltage, that is to say a transient overload or a transient short circuit appears in the SMPS. In this instance, the second comparator 121 outputs a reset enable signal to the encoder 130. The reset enable signal is high and may control the encoder to output the minimum count value. So the increased switching controlling signal may be with the maximum switch-on duration and the highest frequency to drive the power switch, and the undershoot voltage of the SMPS may be decreased.
If the count enable signal maintains high, the encoder 130 will continuously increase one. To avoid the overflow appearing, the overflow protection unit 150 is configured to control the reversible counter to maintain the maximum or minimum count value until the reversible counter changes the count direction when the reversible counter overflows.
To improve the stability of the SMPS controlling circuit, in some exemplary embodiments of the present invention, the switching status selecting unit 30 further comprises a encoding maintaining unit 160 configured to maintain each status of the reversible counter for one or more switching cycle until the switching cycle ends or the reversible counter changes the count direction.
Next, a switch power supply controlling method for controlling an output voltage of a main circuit of a switch power supply will be described with reference to the drawings.
Fig. 10 is a flow chart showing a switch power supply controlling method for controlling an output voltage of a main circuit of a switch power supply according to one exemplary embodiment of the present invention. The method comprises the following steps.
Step 10, generating a switching status selecting signal according to a voltage feedback signal reflecting an voltage change of the main circuit;
Step 11, generating a reference voltage according to a voltage output status selected from a plurality of voltage output statuses by the switching status selecting signal;
Step 12, generating a PMW controlling signal according to the reference voltage and a current feedback signal reflecting a current change of the main circuit;
Step 13, generating a PFM controlling signal with a frequency according to a frequency output status selected from a plurality of frequency output statuses by the switching status selecting signal;
Step 14, generating a switching controlling signal according to the PMW controlling signal and the PFM controlling signal, and
Step 15, switching on or switching off a power switch of the main circuit to stabilize the output voltage of the main circuit according to the switching controlling signal.
Step 10 comprises the following steps: generating an enable signal according to the voltage feedback signal; selecting and outputting a status according to the enable signal, in which the statuses correspond to the voltage output statuses and the frequency output statuses respectively; and converting the status to the switching status selecting signal.
In one embodiment, the statuses are count values and the count values in a small to large order correspond to voltages of the voltage output statuses in a large to small order and the frequencies of the frequency output statuses in a large to small order.
The method may further comprise Step 16, maintaining a maximum or minimum count value when the count value reaches the maximum or minimum count value until changing a count direction. Fig. 11 is a flow chart showing a work procedure of a switch power supply controlling circuit according to one exemplary embodiment of the present invention.
Step 101, the third compactor 122 compares the voltage feedback signal and the second reference voltage Vref2.
Step 102, it is determined whether the voltage feedback signal is larger than the second reference voltage Vref2.
Step 103, if the voltage feedback signal is larger than the second reference voltage Vref2, that is to say an output voltage of the main circuit 20 is high, the third comparator 122 outputs a count enable signal to the encoder 130.
Step 104, the count enable signal is at a high voltage and therefore controls the encoder 130 to increase by one based on the present count value.
Step 105, the decoder 140 converts the count value into the switching status selecting signal and outputs it to the PFM controlling unit 60 and the reference voltage generating unit 40.
Step 106, the PFM controlling unit 60 outputs a PFM controlling signal with a decreased frequency corresponding to the increased count value to the S terminal of the S trigger 170, which makes the frequency of by the switching controlling signal decrease.
Step 107, the reference voltage generating unit 40 outputs a decreased reference voltage corresponding to the increased count value to a negative input terminal of the first comparator 50.
Step 108, the first comparator 50 compares the current feedback signal with the decreased reference voltage and outputs the PWM controlling signal to the terminal of the RS trigger 170, which makes the switching on duration of the switching controlling signal decrease.
Step 109, the switching controlling signal with a decreased frequency and a decreased switch on duration is obtained, so that both the switching on duration and the frequency of the switch power supply are decreased to decrease the output voltage of the main circuit.
Step 203, if the voltage feedback signal is lower than the second reference voltage Vref2, that is to say an output voltage of the main circuit 20 is low, the third comparator 122 outputs a count enable signal to the encoder 130.
Step 204, the count enable signal is at a low voltage and therefore controls the encoder 130 to decrease by one based on the present count value.
Step 205, the decoder 140 converts the count value into the switching status selecting signal and outputs it to the PFM controlling unit 60 and the reference voltage generating unit 40.
Step 206, the PFM controlling unit 60 outputs a PFM controlling signal with an increased frequency corresponding to the decreased count value to the S terminal of the RS trigger 170, which makes the frequency of the switching controlling signal increase.
Step 207, the reference voltage generating unit 40 outputs an increased reference voltage corresponding to the decreased count value to a negative input terminal of the first comparator 50.
Step 208, the first comparator 50 compares the current feedback signal with the increased reference voltage and outputs the PWM controlling signal to the R terminal of the RS trigger 170, which makes the switching on duration of the switching controlling signal increase.
Step 209, the switching controlling signal with an increased frequency and an increased switch on duration is obtained, so that both the switching on duration and the frequency of the switch power supply are increased to increase the output voltage of the main circuit.
In one embodiment, the second compactor 121 compares the voltage feedback signal and the first reference voltage Vrefl . The first reference voltage Vrefl is lower than the second reference voltage Vref2. If the voltage feedback signal is lower than the first reference voltage Vrefl, it shows a transient overload or a transient short circuit appears in the switch power supply. The second comparator 121 outputs a reset enable signal to the encoder 130. The reset enable signal is at a high voltage and may control the encoder 130 to output the minimum count value so as to use the maximum switching on duration and the highest frequency to drive the switch power supply, and an undershoot voltage of the switch power supply may be decreased effectively.
In some embodiment, if the count enable signal maintains at a high voltage, the encoder will increase by 1 continuously. To avoid an overflow, the overflow protection unit 150 is configured to control the reversible counter to maintain the maximum or minimum count value when the reversible counter overflows until the reversible counter counts reversely.
In some embodiment, to improve a stability of the switch power supply controlling circuit 10, the switching status selecting unit 30 further comprises an encoding maintaining unit 160, configured to maintain each status of the revisable counter for one or more switching cycle until the switching cycle ends or the reversible counter counts reversely.
It will be appreciated by those skilled in the art that changes could be made to the examples described above without departing from the broad inventive concept. It is understood, therefore, that this invention is not limited to the particular examples disclosed, but it is intended to cover modifications within the spirit and scope of the present invention as defined by the appended claims.