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Patent Searching and Data


Title:
SYNCHRONOUS DELAY GENERATOR
Document Type and Number:
WIPO Patent Application WO2001017128
Kind Code:
A3
Abstract:
A method for generating a variable delay of a signal (28), including: providing a clock (50) indicating a sequence of sample times at regular intervals and receiving a sequence of input samples (41) representing input values of the signal at respective sample times indicated by the clock. The method further includes determining the delay (40, 46) with a temporal resolution substantially finer than the clock interval to be applied to the signal at each of the respective sample times. For each of the sample times, responsive to the respectively-determined delay, one or more of the input samples are processed so as to generate a corresponding output sample (43) representing a delayed output value of the signal at the sample time.

Inventors:
VEROLI MAURIZIO DI
BAR-DAVID AYAL
Application Number:
PCT/US2000/023951
Publication Date:
September 07, 2001
Filing Date:
August 30, 2000
Export Citation:
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Assignee:
QUALCOMM INC (US)
International Classes:
H04B7/212; H04L7/00; H04L7/02; (IPC1-7): H03H17/06; H03H17/00
Foreign References:
EP0639347A11995-02-22
US3997772A1976-12-14
US4907247A1990-03-06
Other References:
MURPHY N P ET AL: "IMPLEMENTATION OF WIDEBAND INTEGER AND FRACTIONAL DELAY ELEMENT", ELECTRONICS LETTERS,GB,IEE STEVENAGE, vol. 30, no. 20, 29 September 1994 (1994-09-29), pages 1658 - 1659, XP000474909, ISSN: 0013-5194
LIU G -S ET AL: "PROGRAMMABLE FRACTIONAL SAMPLE DELAY FILTER WITH LAGRANGE INTERPOLATION", ELECTRONICS LETTERS,GB,IEE STEVENAGE, vol. 26, no. 19, 13 September 1990 (1990-09-13), pages 1608 - 1610, XP000106903, ISSN: 0013-5194
PATENT ABSTRACTS OF JAPAN vol. 017, no. 097 (E - 1326) 25 February 1993 (1993-02-25)
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