Title:
SYNCHRONOUS INPUT METHOD AND SYNCHRONOUS INPUT DEVICE
Document Type and Number:
WIPO Patent Application WO/2007/145034
Kind Code:
A1
Abstract:
A synchronous input device (10) comprises means (11, 15) for detecting the voltage
difference between the bus side and the input side, means (12, 14) for detecting
the frequency difference between the bus side and the input side, a means (13)
for detecting the phase difference between the bus side and the input side, a setter
(25) for storing the input time difference from a input command to the arrival
as a delay phase difference for every preset frequency difference, and an operating
circuit (20) which can select a delay phase difference from the storage means
depending on the bus side frequency at the time of synchronous input.
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Inventors:
KIOI KAZUCHIKA (JP)
TANIGUCHI TATSUO (JP)
SATO MASAHARU (JP)
NAKAGAWA TUKASA (JP)
AOKI KAZUHIRA (JP)
TANIGUCHI TATSUO (JP)
SATO MASAHARU (JP)
NAKAGAWA TUKASA (JP)
AOKI KAZUHIRA (JP)
Application Number:
PCT/JP2007/058979
Publication Date:
December 21, 2007
Filing Date:
April 25, 2007
Export Citation:
Assignee:
YANMAR CO LTD (JP)
KIOI KAZUCHIKA (JP)
TANIGUCHI TATSUO (JP)
SATO MASAHARU (JP)
NAKAGAWA TUKASA (JP)
AOKI KAZUHIRA (JP)
KIOI KAZUCHIKA (JP)
TANIGUCHI TATSUO (JP)
SATO MASAHARU (JP)
NAKAGAWA TUKASA (JP)
AOKI KAZUHIRA (JP)
International Classes:
H02J3/42
Foreign References:
JPH0467730A | 1992-03-03 |
Attorney, Agent or Firm:
YANO, Juichiro (1-61 Shiromi 2-chome, Chuo-ku, Osaka-sh, Osaka 34, JP)
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