Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
SYSTEM BUS DEVICE RESPONSE TIMEOUT PROCESSING METHOD AND APPARATUS, AND STORAGE MEDIUM
Document Type and Number:
WIPO Patent Application WO/2017/012459
Kind Code:
A1
Abstract:
A system bus device response timeout processing method, a timeout processing apparatus, and a storage medium. The method comprises: monitoring in real time a response time of a slave device in a system bus device (200); when the monitored slave device response times out, determining an importance level of the slave device which experienced the response timeout (201); on the basis of a determination result, processing the slave device which experienced the response timeout (202).

More Like This:
JPS5727325TESTING DEVICE FOR BIDIRECTIONAL BUS COUPLING CIRCUIT
JP2001022485INTERFACE CABLE
JP3698458METHOD FOR SEQUENCING BUS TRANSACTION IN MULTI-LAYERED BUS SYSTEM AND COMPUTER SYSTEM
Inventors:
ZHANG YI (CN)
LIU JIANPING (CN)
Application Number:
PCT/CN2016/088131
Publication Date:
January 26, 2017
Filing Date:
July 01, 2016
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SANECHIPS TECH CO LTD (CN)
International Classes:
G06F13/40
Foreign References:
CN101000596A2007-07-18
CN102025652A2011-04-20
CN104378274A2015-02-25
CN102207918A2011-10-05
CN101572702A2009-11-04
Attorney, Agent or Firm:
CHINA PAT INTELLECTUAL PROPERTY OFFICE (CN)
Download PDF:
View/Download PDF      PDF Help



 
Previous Patent: CULTURAL RELIC FUMIGATING METHOD

Next Patent: METHOD AND APPARATUS FOR DETECTING FAILURE OF RANDOM MEMORY, AND PROCESSOR