Title:
SYSTEM, METHOD AND ARTICLE OF MANUFACTURE FOR DATA TRANSFER ACROSS CLOCK DOMAINS
Document Type and Number:
WIPO Patent Application WO2002031664
Kind Code:
A3
Abstract:
A system, method and article of manufacture are provided for data transfer across different clock domains. A request for transferring data from a sending (transmitting) process in a first domain to a receiving process in a second domain is received. The first domain and the second domain have different clocks. A channel circuit is created with handshaking and resynchoronization logic to help resolve metastability. The channel circuit is then used to transfer the data from the sending process to the receiving process.
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Inventors:
BOWEN MATT (GB)
Application Number:
PCT/GB2001/004538
Publication Date:
May 01, 2003
Filing Date:
October 11, 2001
Export Citation:
Assignee:
CELOXICA LTD (GB)
BOWEN MATT (GB)
BOWEN MATT (GB)
International Classes:
G06F5/06; G06F13/40; (IPC1-7): G06F17/50
Foreign References:
| US5291529A | 1994-03-01 |
Other References:
LIN B ET AL: "Embedded architecture co-synthesis and system integration", HARDWARE/SOFTWARE CO-DESIGN, 1996. (CODES/CASHE '96), PROCEEDINGS., FOURTH INTERNATIONAL WORKSHOP ON PITTSBURGH, PA, USA 18-20 MARCH 1996, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 18 March 1996 (1996-03-18), pages 2 - 9, XP010157850, ISBN: 0-8186-7243-9
XIA F ET AL: "Asynchronous communication mechanisms using self-timed circuits", ADVANCED RESEARCH IN ASYNCHRONOUS CIRCUITS AND SYSTEMS, 2000. (ASYNC 2000). PROCEEDINGS. SIXTH INTERNATIONAL SYMPOSIUM ON EILAT, ISRAEL 2-6 APRIL 2000, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 2 April 2000 (2000-04-02), pages 150 - 159, XP010377324, ISBN: 0-7695-0586-4
LEVISON J ET AL: "An asynchronous communication protocol for internode connections in a scalable processor array", VLSI SIGNAL PROCESSING, VI, 1993., YWORKSHOP ON VELDHOVEN, NETHERLANDS 20-22 OCT. 1993, NEW YORK, NY, USA,IEEE, 20 October 1993 (1993-10-20), pages 489 - 497, XP010140377, ISBN: 0-7803-0996-0
PAGE I: "CONSTRUCTING HARDWARE-SOFTWARE SYSTEMS FROM A SINGLE DESCRIPTION", JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL. IMAGE, AND VIDEO TECHNOLOGY, KLUWER ACADEMIC PUBLISHERS, DORDRECHT, NL, vol. 12, no. 1, 1996, pages 87 - 107, XP000552006, ISSN: 0922-5773
XIA F ET AL: "Asynchronous communication mechanisms using self-timed circuits", ADVANCED RESEARCH IN ASYNCHRONOUS CIRCUITS AND SYSTEMS, 2000. (ASYNC 2000). PROCEEDINGS. SIXTH INTERNATIONAL SYMPOSIUM ON EILAT, ISRAEL 2-6 APRIL 2000, LOS ALAMITOS, CA, USA,IEEE COMPUT. SOC, US, 2 April 2000 (2000-04-02), pages 150 - 159, XP010377324, ISBN: 0-7695-0586-4
LEVISON J ET AL: "An asynchronous communication protocol for internode connections in a scalable processor array", VLSI SIGNAL PROCESSING, VI, 1993., YWORKSHOP ON VELDHOVEN, NETHERLANDS 20-22 OCT. 1993, NEW YORK, NY, USA,IEEE, 20 October 1993 (1993-10-20), pages 489 - 497, XP010140377, ISBN: 0-7803-0996-0
PAGE I: "CONSTRUCTING HARDWARE-SOFTWARE SYSTEMS FROM A SINGLE DESCRIPTION", JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL. IMAGE, AND VIDEO TECHNOLOGY, KLUWER ACADEMIC PUBLISHERS, DORDRECHT, NL, vol. 12, no. 1, 1996, pages 87 - 107, XP000552006, ISSN: 0922-5773
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