Title:
SYSTEM AND METHOD FOR ILLUMINATION TIMING COMPENSATION IN RESPONSE TO ROW RESISTANCE
Document Type and Number:
WIPO Patent Application WO2003034385
Kind Code:
A3
Abstract:
A current driving circuit (264) for use with a display of light emitting elements arranged in rows and columns. The current driving circuit (264) is configured to control the exposure time of column current sources (270) based on the row voltage seen by the pixel in that column. The current driving circuit (264) allows for more closely matching the currents across the array of light emitting elements in the display by compensating for variations in voltage caused by resistance in the row lines. The invention also provides a method of balancing currents in a display device comprising controlling the exposure time of column current sources based on the row voltage seen by the light emitting elements in the column.
Inventors:
LECHEVALIER ROBERT E
Application Number:
PCT/US2002/033374
Publication Date:
December 18, 2003
Filing Date:
October 17, 2002
Export Citation:
Assignee:
CLARE MICRONIX INTEGRATED SYST (US)
International Classes:
C22B9/02; G01R31/00; G05F3/02; G09G3/10; G09G3/30; G09G3/32; G09G5/00; H02M1/08; H02M3/07; H03F1/08; H03F3/45; H03F3/68; G09G; (IPC1-7): G09G3/32
Domestic Patent References:
| WO2001027910A1 | 2001-04-19 | |||
| WO1998052182A1 | 1998-11-19 |
Foreign References:
| EP1067505A2 | 2001-01-10 | |||
| GB2337354A | 1999-11-17 | |||
| US5684368A | 1997-11-04 |
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