SYSTEM AND METHOD FOR INSPECTING A WAFER - SEMICONDUCTOR TECH & INSTR INC

Title:

SYSTEM AND METHOD FOR INSPECTING A WAFER

Document Type and Number:

WIPO Patent Application WO/2010/082901

Kind Code:

A3

Abstract:

An inspection system for inspecting a semiconductor wafer. The inspection system comprises an illumination setup for supplying broadband illumination. The broadband illumination can be of different contrasts, for example brightfield and darkfield broadband illumination. The inspection system further comprises a first image capture device and a second image capture device, each configured for receiving broadband illumination to capture images of the semiconductor wafer while the semiconductor wafer is in motion. The system comprises a number of tube lenses for enabling collimation of the broadband illumination. The system also comprises a stabilizing mechanism and an objective lens assembly. The system further comprises a thin line illumination emitter and a third image capture device for receiving thin line illumination to thereby capture three-dimensional images of the semiconductor wafer. The system comprises a reflector assembly for enabling the third image capture device to receive illumination reflected from the semiconductor wafer in multiple directions.

Inventors:

AMANULLAH AJHARALI (SG)
LIN JING (SG)
GE HAN CHENG (SG)
WONG KOK WENG (SG)

Application Number:

PCT/SG2010/000005

Publication Date:

October 28, 2010

Filing Date:

January 13, 2010

Export Citation:

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Assignee:

SEMICONDUCTOR TECH & INSTR INC (SG)
AMANULLAH AJHARALI (SG)
LIN JING (SG)
GE HAN CHENG (SG)
WONG KOK WENG (SG)

International Classes:

H01L21/66

Foreign References:

US5822055A	1998-10-13
US6324298B1	2001-11-27
US20070182958A1	2007-08-09
US20050168729A1	2005-08-04
US20080144014A1	2008-06-19
US20070081151A1	2007-04-12

Other References: