Technical Field

The present invention relates to a system and a method for offsetting the input voltage unbalance of condenser benches in multilevel inverters or similar devices.

Background Art

The use is known and has been common for some time of electronic apparatus so-called "inverters" suitable for converting a direct input current into an alternate output current.

The applications of inverters are numerous and go, e.g., from the use in UPS units for the conversion of direct current from a power battery, to use in industry for adjusting the speed of electric motors or, again, to use for the conversion of electricity coming from production plants such as, e.g., photovoltaic plants, before introduction into the power distribution network.

A particular type of inverter is the multilevel inverter, so-called NPC (Neutral Point Clamped), which is able to supply more than two levels of power voltage at output so as to generate a wave shape as close as possible to a sinusoid shape. By way of example, figure 1 shows the general diagram of a three-phase, triple- level NPC inverter.

At the input to an NPC inverter, several condensers are commonly used in series to split up the total power voltage and create the voltage levels required to generate the output voltage.

The inverter of figure 1, in particular, has an input branch composed of two condensers C of the same capacity in series the one with the other and associated with a power voltage source V _dc in correspondence to a terminal with positive power voltage V _dc ⁺ , to a terminal with negative power voltage V _dc - and to a neutral point NP (Neutral Point) between the two condensers C.

The inverter shown in figure 1 comprises three electronic power switching units, such as Mosfet, IGBT or similar devices, indicated by the references S _a i S _b i S _cl S _d i, Sa2 S _b 2 S _c2 Sd2 and S _a3 S _b3 S _c3 S _d3 , which are suitably connected together on three branches, one for each phase fl , f2 and f3. The inverter also comprises three pairs of diodes, indicated in figure 1 by the references D _al and D _bl , and D _b2 , and D _b3 respectively.

With reference to the branch relating to the phase fl, e.g., the diodes D _al and D _bl are arranged in series the one with the other and connect the neutral point NP to the connection point between the switches S _a] and S _b i and to the connection point between the switches S _c i and S _d j respectively.

The diodes D^, D _b2 , and D _b3 are similarly connected with the branches relating to the phases f2 and B.

By commanding the closing of the switches S _al S _b i S _c i S _d i, S _b2 S _c2 and Sjr _f S _b3 Sc3 Sd3 each of the phases can be connected to the positive of the voltage V _dc +, to the negative of the voltage V _dc - and to the node NP (Neutral Point) with intermediate voltage compared to V _dc + and V _dc -.

The quick switching of the switches between the possible configurations is performed by means of suitable modulation techniques, so as to obtain an alternate voltage and output current on the three phases, starting with the direct power voltage V _dc .

The operation of these multilevel inverters of NPC type, single or multiphase, does however have a number of drawbacks.

In particular, during operation, a voltage unbalance can occur on the benches of condensers C at its input, conventionally known as "DC bus voltages".

The condensers C, in fact, can charge and discharge to a different extent according to the conduction time window of the different components, thereby producing output voltages of different amplitude.

The equalisation of the CD bus voltages during inverter operation can be performed using different systems and methods of known type.

A first known method, e.g., envisages the use of electronic circuits in addition to the inverter, suitable for balancing, moment per moment, the voltage at the heads of the two condensers C on the input branch.

Such electronic circuits of known type, however, are not without their drawbacks.

In fact, these electronic circuits are of the dissipative type, because the equalisation is partially achieved by dissipating the excess energy present on one of the two condensers C and loading the other of the condensers C through the power voltage source V _dc at input.

Furthermore, this equalisation method requires the insertion of additional circuit elements which increase the costs and the overall complexity of the system. A second equalisation method of known type, on the other hand, envisages the use of suitable methods of modulation of the inverter switches.

These methods however are not without drawbacks either.

Their use, in fact, considerably increases the complexity of the system because, in particular when three-phase converters are used, they can only be implemented by means of the coordinated operation of the three groups of inverters on the three output branches.

A further known equalisation method envisages the use of two independent power voltage sources, realisable by means of two distinct DC supply units or by means of a so-called "symmetric booster".

This method too however implies a greater complexity and a higher cost of the system.

Finally, another equalisation method of known type envisages the supply of a direct mains current able to unbalance the powers absorbed by the two condensers C, thus permitting the equalisation of the two DC bus power voltages.

This equalisation method also has problems tied in particular to the applicable standards regulating the connection to the power mains network, which indicate very stringent limits for the supply of a direct component in the mains.

Description of the Invention

The main aim of the present invention is to provide a system and a method for offsetting the input voltage unbalance in a multilevel inverter or the like, which allow overcoming the mentioned drawbacks of the state of the art.

Another object of the present invention is to provide a system and a method for offsetting the input voltage unbalance in a multilevel inverter or the like which allow overcoming the mentioned drawbacks of the state of the art within the ambit of a simple, rational, easy and effective to use as well as low cost solution. The above objects are achieved by the present system for offsetting the input voltage unbalance in multilevel inverters or the like, comprising at least a control unit operatively associated with at least a multilevel inverter for converting direct current into alternate current, said control unit being suitable for piloting said multilevel inverter for generating at least an output current depending on at least a reference current, characterised by the fact that it comprises at least an equalisation unit for equalising the input voltages of said multilevel inverter having:

- first generation means of at least a harmonic component of order equal to said reference current, out of phase with respect to the fundamental component of said reference current;

- detection means of the unbalance of the input voltages to said multilevel inverter;

- regulation means of the amplitude of said harmonic component depending on me detected unbalance, for offsetting said unbalance.

The above objects are all achieved by the present method for offsetting the unbalance of the input voltages in multilevel inverters or the like, comprising at least a control phase of at least a multilevel inverter for converting direct current into alternate current, in which said multilevel inverter is piloted for generating at least an output current depending on at least a reference current, characterised by the fact that it comprises the following phases:

- generation of at least a harmonic component of order equal to said reference current, out of phase with respect to the fundamental component of said reference current;

- detection of the unbalance of the input voltages to said multilevel inverter;

- regulation of the amplitude of said harmonic component depending on the detected unbalance, for offsetting said unbalance.

Brief Description of the Drawings

Other characteristics and advantages of the present invention will become more evident from the description of a preferred, but not sole, embodiment of a system and a method for offsetting the unbalance of the input voltage in multilevel inverters or the like, illustrated purely as an example but not limited to the annexed drawings in which:

figure 2 is a general block diagram of the system according to the invention; figure 3 is a circuit diagram showing a possible embodiment of a unit for the conversion of direct current into alternate current according to the invention; figure 4 is a graph showing, by way of example, possible voltage, current and mains power patterns generated by the conversion unit according to the invention and injected into a power distribution network;

figure 5 is a graph showing, by way of example, possible patterns of the total mains current injected into the power distribution network and of the respective fundamental component and second order harmonic component;

figure 6 is a graph showing, by way of example, possible patterns of the instantaneous and average powers absorbed by the condensers at the input of a multilevel inverter of the conversion unit, in the case of the injection into the power distribution network of a harmonic component of the second order mains current, 90° out of phase and with an amplitude equal to 20% with respect of the fundamental component of the mains current;

figure 7 is a graph showing, by way of example, possible patterns of the unbalance of the average powers on the two condensers according to the harmonics of the mains current of an order above the first, wherein the amplitude of the harmonic components of the mains current is equal to 20% of the amplitude of the fundamental component.

Embodiments of the Invention

With particular reference to figure 2, globally indicated by O is a system for offsetting the input voltage unbalance of condenser benches in multilevel inverters or similar device.

Usefully, the system O can be applied to a multilevel inverter of the conventional type and can be used in numerous common-type applications such as, e.g., the conversion of the direct current produced by photovoltaic modules or the conversion of the direct current produced by a battery inside UPS units. In particular, the system O is associated with a unit for the conversion of direct current into alternate current comprising a multilevel inverter I and an input branch B connected to the inverter and to a power voltage source PW made up, e.g., of a power generator.

A filtering unit F, made by means of a filter type LC, LCL or the like, is arranged downstream of the multilevel inverter I and is connected to a sinusoid alternate current power distribution grid G.

With particular reference to the embodiment shown in figure 3, the multilevel inverter I is of the type of a NPC (Neutral Point Clamped) inverter, single-phase with three voltage levels. Different embodiments cannot however be ruled out in which an inverter is used with more than three voltage levels and/or of the multiphase type.

Always with reference to the embodiment shown in figure 3, furthermore, the input branch B is made up of two condensers C _bus+ and C _bus - connected in series the one to the other and has the two opposite terminals connected to the positive pole V _dc + and to the negative pole V _dc - of the PW power voltage source respectively.

It must also be pointed out that the condensers C _bus + and C _bus - shown in the figure 3 can be representative of the series and/or of the parallel of several condensers made physically to achieve the necessary total capacity.

The connection point between the two condensers C _bus+ and C _bus- , indicated in the figure 3 by the reference NP, is the neutral point of the multilevel inverter I wherein the voltage is intermediate with respect to V _dc + and to V _dc -.

The input voltages to the multilevel inverter I, commonly known as "DC bus voltages" are composed of the voltages V _bus+ and V _bus- present at the heads of the condensers C _bus+ and C _bus . respectively.

The system O comprises a control unit U, operatively associated with the multilevel inverter I and suitable for piloting this multilevel inverter to generate at least an alternate output current I _out , produced according to a reference current -

More specifically, the control unit U pilots the multilevel inverter I so as to generate an output current I _out , the wave shape of which reproduces the wave shape of the reference current I _ref .

The multilevel inverter I, in particular, comprises a first and a second electronic switch S _a and S _b connected in series the one to the other between the positive pole V _dc + and an output terminal, and a third and a fourth electronic switch S _c and S _d connected in series between the negative pole V _dc - and the output terminal.

Each of the switches S _a , S _b , S _c and S _d is operatively associated with the control unit U.

In particular, the control unit U comprises generation means of four distinct control signals P _a , Pb, P _c , Pd _> pulse wave modulated and suitable for controlling the first, the second, the third and the fourth switch S _a , S _b , S _c and S _d respectively.

The use cannot however be ruled out of control signals of the switches S _a , S _b , S _c and S _d modulated by means of different pulse modulation methods.

Usefully, these switches S _a , S _b , S _c and S _d can be made up of Mosfet, IGBT or other static switching devices.

The multilevel inverter I also has a first diode D _a and a second diode D _b .

The first diode D _a has the anode connected to the input branch B in correspondence to the neutral point NP and the cathode connected to the connection point between the first switch S _a and the second switch S _b , while the second diode D _b has the cathode connected to the input branch B, in correspondence to the neutral point NP, and the anode connected to the connection point between the third switch S _c and the fourth switch S _d .

Usefully, the first and the second diode D _a and D _b and the diodes associated in anti-parallel with the switches S _a , S _b , S _c and S _d , not shown in figure 3 being of known type, can be diodes with silicon substrate or SiC (Silicon Carbide) substrate, which allow a reduction of the switching losses.

Advantageously, the system O comprises an equalization unit, indicated generally in figure 2 by the reference E, suitable for offsetting the input voltage unbalance V _bus + and V _bus- .

In particular, the equalisation unit E comprises first generation means Gl suitable for generating at least a harmonic component Ι _β ¾ of order equal to the reference current I _ref , e.g., a second order harmonic component, suitably out of phase with respect to the fundamental component Ifund of the reference current itself.

The equalisation unit E also comprises detection means D associated with the input branch B, suitable for detecting the unbalance of the input voltages V _bus + and V _bus- , and regulation means R for adjusting the amplitude |I _ehj | of the harmonic component I _ehj according to the unbalance detected, for the offsetting of the unbalance itself.

This way, an output current I _out is set by the multilevel inverter I which has an even harmonic component, e.g., a second order harmonic component I _ou t' \ suitably out of phase with respect to the fundamental component I _ou t' and the amplitude of which is regulated by the equalisation unit E according to the unbalance between the input voltages V _bus+ and V _bus- detected at the heads of the condensers C _bus+ and C _bus- .

Consequently, the mains current I^d coming from the filter F and injected into the power distribution network G also presents an even harmonic component, e.g., a second order harmonic component Ignd", suitably out of phase with respect to the fundamental component Ignd and the amplitude of which is regulated by the equalisation unit E according to the unbalance between the input voltages V _bus+ and V _bus- detected at the heads of the condensers C _bus+ and C _bus- .

The even harmonic component Io _Ul " of the output current I _out , once filtered by the filter F and injected into the power distribution network G, establishes an unbalance between the powers P _bus+ and P _bus- absorbed by the two condensers C _bus+ and C _bus- and, consequently, it can be used to perform the equalisation between the input voltages V _bus+ and V _bus- .

In a preferred embodiment of the system O, the even harmonic component I _out " of the output current I _out is in quadrature with the fundamental component I _out ', so as to increase the offsetting action of the unbalance, the amplitude of such harmonic component being equal, as shown by the graphs of figure 7.

The use cannot however be ruled out of harmonic components I _out " of the output current I _out with a different out-of-phase angle with respect to the fundamental component I _out '.

The detection means D, in particular, are associated with the input branch B and are composed of a device for calculating the difference between the input voltages V _bus+ and V _bus- .

Usefully, the first generation means Gl are suitable for generating a sinusoid harmonic component I _eh j out of phase with respect to the fundamental component 1^. hi particular, the out-of-phase angle of the harmonic component I _ehj - with respect to the fundamental component If^d can be changed but, in a preferred embodiment, it is equal to 90° + k*180°, with k equal to any whole number.

By way of example, the illustrations 4 and 5 show the voltage, current and mains power patterns Vgnd, Igrid and Pgnd in the case in which the harmonic component I _eh j of the reference current I _re f, and consequently the harmonic component Ignd" of the mains current Ignd, is a second order harmonic component, 90° out of phase with respect to the fundamental component I _f i, _nd and with an amplitude |I _eh j| equal to 20% of the amplitude of the fundamental component itself.

In particular, figure 4 graphically shows the voltage, current and mains power patterns Vgnd, Ignd and Pgnd generated by the multilevel inverter I, filtered by the filter F and injected into the power distribution network G.

Figure 5 on the other hand shows in detail the patterns of the total mains current Ignd injected into the power distribution network and of the respective fundamental component Ignd' and second order harmonic component Ignd"- Figure 6, also shows, by way of example, the instantaneous and average patterns of the powers P _bus + and P _bus - absorbed by the condensers C _bus+ and C _bus . at the input of the multilevel inverter I, in the case of the injection into the power distribution network of a harmonic component Ignd" of the second order mains current Ι^, 90° out of phase with respect to the fundamental component Ifund and with an amplitude |Ι ₆ ¾| equal to 20% of the amplitude of the fundamental component itself.

It thus appears evident that the presence of the harmonic component Ignd" in the output current Ignd has, as its effect, a different value of the powers P _bus+ and P _bus- absorbed by the two condensers C _bus+ and C _bus- and this allows, therefore, using the equalisation unit E to achieve a controlled unbalance between the two input voltages V _bus + and V _bus- .

Figure 7 shows the unbalance patterns of the powers P _bus+ and P _bus - on the two condensers C _bus+ and C _bus- according to the phase with respect to the fundamental component Ignd' and to the change in the harmonics of the mains current Ignd of an order above the first.

It can therefore be seen that no unbalance is produced of the input voltages V _bus+ and V _bus - either in the case wherein odd order harmonics of the output current Ignd, are injected into the sinusoidal power distribution network G or in the case wherein the phase displacement of the harmonics is zero or in phase opposition with the fundamental component Ignd'.

It is also noticed that the effect of unbalance on the input voltages V _bus+ and V _bus- drops as the order of the even harmonics increases.

The equalisation by means of the O system of the unbalance of the input voltages V _bus+ and V _bus- , therefore, can be performed in an optimum way when the harmonic component Ignd" of the mains current I^d is a second order harmonic component and it is 90° out of phase with respect to the fundamental component 1^·

The system O also comprises second generation means G2 of the fundamental component 1^ of the reference current I _ref and an adding device A, associated with the first generation means Gl and with the second generation means G2 and suitable for adding the fundamental component Ifund and the harmonic component I _eh j to obtain the reference current I _ref .

Usefully, the system O comprises a synchronisation device PH associated with the first generation means Gl and with the second generation means G2 and suitable for determining the phase of the fundamental component 1^ starting with the phase of the mains voltage Vgn _d injected into the power distribution network G and the phase 9 _eh j of the harmonic component I _eh j of the reference current I _ref with respect to the fundamental component I^nd- In particular, the synchronisation device PH can be made up of a phase-locked loop suitable for generating a synchronisation signal in phase with the mains voltage Vgnd-

Usefully, in a preferred embodiment of the system O, the fundamental component Ifund of the reference current I _re f is in phase with the mains voltage

Vgrid-

This way, the mains current I _ref will also be in phase with the mains voltage Vgnd so as to only transfer active power onto the power distribution network G.

The system O also comprises means of verification S suitable for verifying the difference between the reference current I _ref to be followed and the output current I _ou t generated by means of the multilevel inverter I.

In particular, these verification means S are schematised in figure 2 by means of a negative feedback control that detects the output current I ₀ „t generated by the inverter I and subtracts it from the reference current I _ref corning out of the adding device A.

The method according to the invention is described below.

The method comprises:

- a phase of generation of a fundamental component Ι _&ΙΜΐ of the reference current I _ref , performed by means of the second generation means G2;

- a phase of generation of an even order harmonic component Ι _ε¾ of the reference current I _ref , out of phase with respect to the fundamental component Ifimd;

- the adding of the fundamental component I&nd and the harmonic component I _eh j, by means of the adding device A, to obtain the reference current I _ref .

The method according to the invention also comprises a control phase of the multilevel inverter I, performed by means of the control unit U, wherein the multilevel inverter I is piloted for the generation of the output current Io _Ut in accordance with the reference current I _ref .

In particular, the control phase comprises the generation of the control signals P _a , Pt» P _C5 Pd _> pulse width modulated (PWM) and suitable for controlling the first, the second, the third and the fourth switches S _a , S _b , S _c and S _d respectively of the multilevel inverter I for the generation of the output current I _out .

Advantageously, the method envisages the detection of the unbalance of the input voltages V _bus+ and V _bus- , performed by means of the calculation device D, and the regulation of the amplitude |I _e hj| of the harmonic component I _e hj of the reference current I _ref , performed by means of the regulation means R, for offsetting the unbalance.

In particular, the unbalance detection phase envisages the calculation of the difference between the input voltages V _bus+ and V _bus- at the heads of the condensers C _bus + and C _bus- .

The method also envisages a synchronisation phase of the phase of the fundamental component 1^ with the phase of the mains voltage Vg^ injected into the power distribution network G and a phase of determination of the phase displacement between the fundamental component I fund and the harmonic component I _ehj of the reference current I _ref .

In particular, in a preferred but not exclusive embodiment, such out-of-phase angle is equal to 90° + k*180°, with k equal to any whole number, and the fundamental component Ifund is in phase with the mains voltage Vgnd injected into the power distribution network G.

Finally, it must be pointed out that the system O and the method described above are applicable in exactly the same way if the roles are switched between the current and the mains voltage Ignd and Vgnd, i-e., if a mains voltage Vgnd is set by the multilevel inverter I with an even harmonic component (e.g., a second order harmonic) suitably out of phase with respect to the fundamental component and whose amplitude is adjustable by means of the equalisation unit E according to the unbalance between the input voltages V _bus + and V _bus- .

It has in point of fact been ascertained how the described invention achieves the proposed objects.

In particular, the fact is underlined that the injection into the power distribution network of a mains current having an even harmonic component allows performing the offsetting of the phase displacement of the "DC bus voltages" and at the same time eliminating the drawbacks of the state of the art.