The present invention falls within the field of fire safety systems (hereafter " FSS" ) . It concerns a method and a testing system for testing an FSS activation electrical circuit (hereafter "AEG" ) that is configured for controlling an actuation or activation of one or several fire protection devices (hereafter " FPD" ) . More precisely, the present invention proposes to test a correct working of said AEG free of the activation or actuation of the FPD .

Usually, an FSS comprises a fire detection system and a fire protection system . The latter can be each or together arranged in communication with a fire control and/or indication panel (hereafter " FCP" ) of the FSS . For instance , the fire detection system can be arranged in communication with a fire indication panel and the fire protection system can be arranged in communication with a fire protection panel . In other embodiments , the fire detection system and the fire protection system are both connected to the same fire control and indication panel . While in the following we will usually take the example of building FSS with FPDs and fire detectors (hereafter " FD" ) installed within a building, the present invention is not limited to a building use of an FSS . For instance , an FSS might also equip vehicles , such as planes , ships , etc .

The fire detection system may comprise one or several fire detectors (hereafter " FD" ) . The latter are for instance installed in appropriate areas of a building, at remote locations with respect to the FCP, and configured for detecting fire safety hazards in said appropriate areas . They are for instance smoke detectors , emergency push buttons , etc . The fire protection system aims to alert and protect the occupants of the building and the building itsel f in case of a detection of a safety hazard by one or several FDs and/or upon reception of an alert or information sent by the fire detection system . It typically comprises FPDs installed at di f ferent appropriate locations . For instance , FPDs might be installed in di f ferent rooms or areas of the building, in order to ensure the safety of said one , several , or all ar- eas/rooms of the building . Examples of FPDs are fire doors , alarms , fire fences , elevator fire switch, air conditioner and/or heater control switch, fire dampers , etc .

The FCP might be installed in the building itsel f or in a control center remotely located from the building . It can further be directly and/or indirectly connected to one or several FPDs remotely located with respect to the FCP location . In case of indirect connection, the FCP is usually connected to one or several remote modules (hereafter "RM" ) , which are each connected to one or several of said FPDs . In such a case , the RM may receive a signal from the FCP indicating whether the FPD has to be activated or not .

More generally speaking, the FSS comprises at least one AEC configured for supplying one or several FPDs in energy . Usually, the AEC is installed either in the FCP or in the RM . In case of direct connection of the FPD to the FCP, then the latter comprises said AEC and uses the latter for powering or not the FPD . In case of indirect connection of the FPD to the FCP, then the RM comprises said AEC, and at reception by the RM of said signal sent by the FCP, the RM will energi ze or deenergi ze the FPD in function of the information comprised within the received signal . An FPD is typically characterized by two states - being therefore usually a bi-state device namely an "active" (or "activated") state and an "inactive" (or inactivated) state. According to the present invention, the change from inactive state to active state, and vice versa, is controlled by supplying or not the FPD with energy either directly from the FCP or from the RM via said AEG. The latter, which is responsible for this supply in energy, has thus a key role in the FSS. Indeed, said change of state directly contributes to the safety of the building. Typically, in case of a detection of a safety problem by one or several FDs of the FSS, an alert signal is generated and triggers the energizing or deenergizing of one or several FPDs, the latter changing their respective state from inactive to active, said change of state being configured for launching an action that aims to eliminate or mitigate said safety problem. Currently, two different types of FPDs exist: those which are activated when supplying them with energy (type I) , and those which are activated by deenergizing them (type II) , i.e. by cutting off their supply in energy. In function of the type of FPD, the AEC will thus either start powering the FPD (type I) for activating the latter (i.e. putting the latter in its active state) , or stop powering the FPD (type II) for triggering the activation of the FPD (i.e. putting the latter in the active state) . For instance, an alarm will typically be activated by supplying it with energy via the AEC, while a fire door will be activated by turning off the power supplied by the AEC and that feeds a system for maintaining said fire door open, triggering thus the closing of said fire door.

Known in the art AECs typically comprise a first electrical circuit arrangement (hereafter "EGA") - i.e. a first electrical circuit portion of the AEC - configured for putting a first supply voltage terminal at a first electric potential and a second EGA - i . e . a second electrical circuit portion of the AEG - configured for putting a second supply voltage terminal at a second electric potential . The first and second supply voltage terminals are configured for being coupled respectively to a first input terminal and a second input terminal of an FED . Through this coupling, the AEG is able to energi ze the FED . Usually, at least one among the first EGA and the second EGA, preferentially both, are characteri zed by two states , namely an activated state in which it is configured for putting its supply voltage terminal at a potential V_act configured for putting the FED in its activated state , and a deactivated state in which it is configured for putting its supply voltage terminal at a potential V_deact configured for putting the FED in its deactivated state , with V_deact V_act . Of course , i f both EGA are characteri zed by said two states , then both need to be in the activated state for activating the FED . The change between the activated state and inactivated state is usually implemented by means of an electrical switch configured for connecting a voltage source terminal of the considered EGA to its supply voltage terminal . For instance , the electrical switch of the first EGA is configured for connecting the first supply voltage terminal to a first voltage source terminal at the potential V_A ( e . g . positive or negative ) and configured thus for putting the first supply voltage terminal at said potential V_A when the switch is closed ( i . e . continuous path from the first voltage source terminal until the first supply voltage terminal ) and for electrically disconnecting the first voltage source terminal from the first supply voltage terminal when it is open, and/or, the electrical switch of the second EGA, i f any, is configured for connecting the second supply voltage terminal to a second voltage source terminal at the potential V_B ( e . g . negative i f V_A positive , otherwise positive ) and configured for putting the second supply voltage terminal at the potential V_B when the switch is closed ( i . e . continuous path from the second voltage source terminal until the second supply voltage terminal ) and for electrically disconnecting the second voltage source terminal from the second supply voltage terminal when it is open . Typically, the first and second voltage source terminals are respectively the positive pole and negative pole of a DC voltage source ( e . g . 24VDC ) configured for feeding the FDD in energy . I f , among the first EGA and the second EGA, only the first EGA comprises said electrical switch, then the second EGA is preferentially configured for maintaining the second supply voltage terminal at the potential of the second voltage source terminal , which can be preferentially at the ground potential . The same applies mutatis mutandis i f only the second EGA comprises said electrical switch while the first EGA does not .

One problematic of such ESS is its inability to enable commissioning, maintenance activity, or regulatory inspection without activating or actuating the FDD . This means for instance that during a maintenance activity of an FSS installed in a building, fire doors , elevator fire switches , alarms will be activated or actuated, disturbing thus the normal activities of the building occupants . Additionally, it also requires from the maintenance operator to reengage each FPD where necessary, for instance by manually reopening the fire doors .

In order to solve said problematic, it has been proposed to modi fy existing FPD so that it remains inactive during a test phase . For instance , EP3 748 599 Al discloses an FPD comprising a signal element , wherein said FPD is equipped with a simulation unit configured for being activated instead of the signal element during a test phase .

Unfortunately, the known solutions require to adapt and modi fy each FPD in order to prevent their activation when testing the AEG . The known solutions are thus speci fic to the FPD . This limits the choice of FPD for the FSS and imposes design and manufacturing constraints to the FPD . Current solutions are thus not optimal , and improved solutions are needed .

It is an obj ective of the present invention to provide a system and a method for testing an AEC of an FSS , more precisely, the correct change of state of a bi-state EGA of an AEC configured for controlling an actuation or activation of one or several FPDs , said testing being free of an activation or actuation of said one or several FPD connected to the AEC and free of any modi fication of said FPD .

This obj ective is achieved according to the present invention by a method and a testing system for testing a bi-state EGA of an AEC of an FSS according to the obj ect of the independent claims . Dependent claims present further advantages of the invention .

The present invention concerns thus a testing system configured for being connected to an AEC of an FSS . Such an AEC is described in detail in Fig . 2 . Through its connection to the AEC, the testing system according to the invention is able to test at least one AEC bi-state EGA, preferentially both bi- state EGAs of the AEC . For this purpose , the testing system comprises :

- a driver circuit configured for being connected to the AEC, said driver circuit comprising one or several electrical components configured for maintaining, between the supply voltage terminals of the AEC and during a test of said bi-state EGA, a voltage di f ference within a range of values configured for keeping, during said test , the FED in its deactivated state ;

- a sensing unit configured for measuring the voltage at least at the supply voltage terminal of the tested bistate EGA;

- a processing unit or controller configured for carrying out a testing procedure of the AEC for testing said bistate EGA, said testing procedure comprising

( i ) putting the bi-state EGA that has to be tested, and preferentially only the latter, in its activated state while controlling said one or several electrical components of the driver circuit for maintaining, between the AEC supply voltage terminals and during said test of the bi-state EGA, said voltage di f ference within said range of values configured for keeping, during said test , the FED deactivated, and

( ii ) triggering, during said test , a voltage measurement , by the sensing unit , of the voltage delivered at least at the supply voltage terminal of the tested bi-state EGA, said processing unit being further configured for receiving from the sensing unit each voltage value measured during said voltage measurement , and for detecting from the received voltage value , e . g . from a comparison of the received voltage value ( s ) with one or several predefined voltage value ( s ) , a failure of the tested bi-state EGA. In particular, i f the other EGA of the AEC is also a bi- state EGA, then the processing unit is configured for testing both bi-state EGAs , successively one after the other .

The present invention concerns also a method for testing a bi-state EGA of an AEG, the method comprising the following steps :

- receiving a request for testing said bi-state EGA or said AEG ;

- automatically launching a testing procedure by a processing unit , wherein said testing procedure comprises :

( i ) putting the bi-state EGA that has to be tested in its activated state while controlling one or several electrical components of a driver circuit for maintaining, between the supply voltage terminals of the AEG, a voltage di f ference within a range of values configured for keeping the FED deactivated . Preferentially, only one of the bi-state EGAs is put in its activated state during said testing procedure , the other one remaining deactivated;

( ii ) triggering a voltage measurement , by a sensing unit , of the voltage delivered at least at the supply voltage terminal of the tested bi-state EGA;

( iii ) optionally, and notably i f the request indicates to test the AEG, repeating steps ( i ) and ( ii ) for the other EGA i f the latter is also a bi-state EGA, the bi-states of the AEG being thus successively tested one after the other ;

- receiving, by the processing unit , the voltage value ( s ) measured during each voltage measurement . Preferentially, each measured voltage value is automatically transmitted to the processing unit by the sensing unit ; and - detecting, by the processing unit and from the received voltage value (s) , whether there is a failure of the tested bi-state ECA(s) .

Preferentially, in the case of an FPD configured for being activated by supplying the latter with energy (i.e. FPD of type I) , the driver circuit is configured for connecting, during said test, both supply voltage terminals to the voltage source terminal of the tested bi-state EGA, while disconnecting the supply voltage terminal of the non-tested EGA from its voltage source terminal.

For FPDs activated by a cutting off of their power supply (i.e. FPD of type II) , the driver circuit preferentially comprises an additional voltage source terminal at a potential V_T chosen in function of a predefined FPD activation voltage threshold V_thresh and configured for maintaining the FPD deactivated during said test, said driver circuit being further configured for connecting, during said test, the supply voltage terminal of the tested bi-state EGA to said additional voltage source terminal. In particular, in case of testing the EGA whose supply voltage terminal is configured for being connected to the voltage source terminal that is positive, then the processing unit is configured for setting the additional voltage source terminal at a potential V_T different, preferentially smaller, than V_deact (i.e. smaller than the voltage delivered by the bi-state EGA when it is in its deactivated state) , but greater than the predefined FPD activation voltage threshold, with V_thresh > V_act (i.e. the voltage delivered at the supply voltage terminal of the bi-state EGA when it is in its activated state) . In case of testing the EGA whose supply voltage terminal is configured for being connected to the voltage source terminal that is negative, then the processing unit is configured for setting the additional voltage source terminal at a potential V_T that is positive , but smaller than (V_deact - V_thresh) According to the present invention, V_thresh is a threshold voltage value below which the FPD becomes activated . Preferentially, the supply voltage terminal of the non-tested EGA remains , at the same time , connected to its voltage source terminal . Typically, 0 . 1 -V_deact < V_T < 0 . 9 -V_deact , with preferentially, 0 . 3 -V deact < V T < 0 . 7 -V deact .

Preferentially, the driver circuit comprises at least one electrical switch . In particular, in the case of an AEG configured for powering an FPD of type I , said electrical switch is configured for connecting the voltage source terminal of the bi-state EGA to be tested to the supply voltage terminal of the non-tested bi-state EGA. I f both bi-state EGAs of the AEG have to be tested, then the driver circuit comprises two electrical switches , namely a first electrical switch S I connecting the voltage source terminal of one of the bi-state EGAs ( called hereafter " first EGA" ) to the supply voltage terminal of the other one of the bi-state EGAs ( called hereafter " second EGA" ) , and a second electrical switch S2 connecting the voltage source terminal of the second EGA to the supply voltage terminal of the first EGA. In particular, in the case of an AEG configured for powering an FPD of type I I , said electrical switch is configured for connecting the additional voltage source terminal to the supply voltage terminal of the tested EGA. Again, i f both bi-state EGAs of the AEG have to be tested, then the driver circuit comprises two electrical switches , namely a first electrical S ' l switch configured for connecting the additional voltage source terminal to the supply voltage terminal of the first EGA and a second electrical switch S ' 2 configured for connecting the additional voltage source terminal to the supply voltage terminal of the second EGA. Finally, in the case of an AEG configured for powering an FED of type I or an FPD of type I I , then the driver circuit preferentially comprises the four electrical switches previously described, i . e . S I , S2 , S ' l , and S ' 2 .

For a more complete understanding of the present invention, and the advantages thereof , reference is now made to the following description taken in conj unction with the accompanying drawings , wherein like numbers designate like obj ects , and in which :

Figure 1 schematically illustrates an FSS according to prior techniques ;

Figure 2 schematically illustrates an AEG of the FSS of Figure 1 ;

Figure 3 schematically illustrates a flowchart describing a preferred embodiment of a method according to the invention;

Figures 4A-4C schematically illustrate a preferred embodiment of a testing system for automatically testing a bi-state EGA of an AEG connected to an FPD of type I ;

Figures 5A-5B schematically illustrate a preferred embodiment of a testing system for automatically testing a bi-state EGA of an AEG connected to an FPD of type I I ;

Figure 6 schematically illustrates a preferred embodiment of a testing system for automatically testing the other bi-state EGA of the AEG of Fig . 5A-5B . Figure 7 schematically illustrates a preferred embodiment of a testing system for automatically testing both bi-state EGAs of the AEG of Fig . 5A-5B .

Figure 8 schematically illustrates a preferred embodiment of a testing system for testing a bi-state EGA of an AEG that might be configured for an FPD of type I or I I .

FIGURES 1 through 8 , discussed below, and the various embodiments used to describe the principles of the present disclosure in this patent document are by way of illustration only and should not be construed in any way to limit the scope of the disclosure . Those skilled in the art will understand that the principles of the present disclosure may be implemented in any suitably arranged electrical circuit . The numerous innovative teachings of the present application will be described with reference to exemplary non-limiting embodiments .

Figures 1 and 2 illustrate schematically an FSS 100 and an AEG 200 . Latter one can be for instance installed in the FCP 101 of the FSS or in a RM 102 of said FSS 100 . As shown in Fig . 1 , the FCP 101 is connected to one or several RM 102 which are remotely located with respect to the FCP 101 and preferably connected in series . Each RM 102 might be connected to one or several FPD 103 . The FCP 101 might also be directly connected to one or several FPD 103 . The FCP 101 is arranged for activation or deactivation of the FPD 103 . This is carried out by controlling the AECs 200 which are arranged for supplying power to the di f ferent FPDs 103 . Each FPD 103 is thus connected to an AEC 200 and its powering is controlled by the latter . The AEC 200 is typically configured for receiving, from the FCP 101 , a signal indicating whether it has to activate or not the FPD 103. Upon reception of said signal, the AEG triggers an action according to the information comprised in said signal, e.g. powering an FPD 103 of type I or cutting off the power of an FPD 103 of type II if said signal requires an activation of each FPD 103 that is connected to the AEG 200.

As shown in Fig. 2, the AEG 200 comprises two EGAs, e.g. a first EGA 210 and a second EGA 220, each comprising a voltage source terminal, e.g. a first voltage source terminal 212 for the first EGA 210 and resp. a second voltage source terminal 222 for the second EGA 220, and a supply voltage terminal, e.g. a first supply voltage terminal 211 for the first EGA 210 and resp. a second supply voltage terminal 221 for the second EGA 220. For each EGA, its supply voltage terminals are configured for being connected to its voltage source terminal. The voltage source terminal of one of said EGAs, for instance the first voltage source terminal 212, is the positive terminal of a voltage source, and the voltage source terminal of the other EGA, for instance the second voltage source terminal 222, is the negative terminal of said voltage source. Said negative terminal might be connected to the ground 242.

Among said two EGAs, at least one is a bi-state EGA, i.e. an EGA characterized by two states: an activated state in which it is configured for putting its supply voltage terminal at a potential V_act configured for putting the FPD in its activated state, and a deactivated state in which it is configured for putting its supply voltage terminal at a potential V_deact configured for putting the FPD in its deactivated state. The potential difference at the supply voltage terminals will thus generate a voltage, resp. an activation voltage U_act ( e . g . U_act = 24V for a type I FPD, or U_act = OV for a type I I FPD) configured for activating the FPD and a deactivation voltage U_deact ( e . g . U_deact = OV for said type I FPD, or U_deact = 24V for said type I I FPD) configured for deactivating the FPD . In the example of Fig . 2 , both EGAs are bi-state EGAs . Preferentially, at least the EGA comprising the supply voltage terminal configured for contacting the positive voltage source terminal of the voltage source is a bi-state EGA. Said two states might be implemented by connecting the voltage source terminal to the supply voltage terminal via an electrical switch 231 , 232 whose open- ing/closing is controlled by the AEG in function of said information comprised in the signal sent by the FCP 101 . The supply voltage terminals of the AEG, i . e . the fist supply voltage terminal 211 and the second supply voltage terminal 221 , are each connected to an input voltage terminal of the FPD 103 for supplying the latter in energy . For instance , the first supply voltage terminal 211 is configured for being coupled to a first input voltage terminal of the FPD 103 and the second supply voltage terminal 221 is configured for being coupled to a second input voltage terminal of the said FPD 103 , each input voltage terminal being thus at a di f ferent potential that depends on the voltage of the voltage source .

One problematic with such an AEG is notably related to its commissioning, maintenance , or inspection . During the latter, the AEG has to be tested in order to ensure that its supply voltage terminals work correctly . Unfortunately, testing the AEG will result also in an activation of the FPDs while there is no safety risk . The present invention proposes a new concept than enables commissioning, maintenance , or inspection activities of the AEG without activating the FPD ( s ) connected to the latter.

This new concept will be explained hereafter in more detail in connection with Fig. 3-8, which show preferred embodiments of the method and testing system for automatically testing any bi-state EGA of the AEG in a manner free of any activation of the FPD(s) connected to said AEG.

According to the present invention, and as illustrated in Fig. 4-7, the testing system comprises a sensing unit 410, a processing unit 420, and a driver circuit configured for being connected to the AEG 200. The driver circuit comprises one or several electrical components whose coupling or connection with the AEG is configured for maintaining, when testing a bi-state EGA 210, 220 of the AEG 200, e.g. when successively testing each bi-state EGA of the AEG, a voltage difference between the supply voltage terminals 211, 221 that remains within a range of voltage values configured for keeping the FPD in its deactivated state during said test. According to the present invention, "testing" the bi-state EGA means that it will be put, by the processing unit 420, in its activated state, while controlling and measuring the voltage delivered at its output, i.e. measured between the supply voltage terminal of the tested EGA and a referential potential, and wherein said controlling of the voltage is configured for keeping the potential difference between the supply voltage terminal of the tested EGA and the supply voltage terminal of the non-tested EGA within a range of values configured for keeping the FPD 103 in its deactivated state.

To achieve this, different preferred embodiments of the driver circuit are presented with Figures 4-7 and will be described hereafter. In particular, Figures 4A-4C show a preferred embodiment of the driver circuit that is particularly fitted for maintaining said voltage di f ference between the supply voltage terminals 211 , 221 within said range of voltage values when the AEG is connected to an FED of type I . Said driver circuit comprises notably an electrical switch configured for connecting the voltage source terminal of the EGA to be tested to the supply voltage terminal of the nontested EGA. For instance , the driver circuit may comprise a first electrical switch 431 configured for connecting the first voltage source terminal 212 to the second supply voltage terminal 221 and/or a second electrical switch 432 configured for connecting the second voltage source terminal 222 to the first supply voltage terminal 211 .

Other preferred embodiments of the driver circuit are provided by Figures 5-7 and are particularly fitted for maintaining said voltage di f ference between the supply voltage terminals 211 , 221 within said range of voltage values when the AEG is connected to an FPD of type I I . As for the driver circuit illustrated in Fig . 4A-4C, the driver circuit of Fig . 5-7 comprises also at least one electrical switch 532 , 631 , but contrary to the electrical switch 431 or 432 presented in Fig . 4 and which serves to connect the voltage source terminal of the tested bi-state EGA to the supply voltage terminal of the non-tested EGA, the electrical switch 532 , 631 is configured for connecting an additional voltage source terminal 531 at a potential V_T to the supply voltage terminal 211 , 221 of the tested bi-state EGA. For instance , as illustrated in Fig . 5A, and in order to enable testing the first EGA 210 , the additional voltage source terminal 531 is connected to said electrical switch 532 , the latter being connected to the first supply voltage terminal 211 of the first EGA 210 via a diode 535 configured for letting the current flowing towards said first supply voltage terminal 211 . Preferentially, the electrical path connecting the electrical switch 532 to the anode of the diode 535 is connected, via a resistor 533 to the ground 534 . Said resistor 533 ensures in particular that the voltage measured at a third measurement point 413 located between the anode of the diode 535 and the resistor 533 is 0V when the electrical switch 532 is open . This grounding enables thus to the control of the state ( open/close ) of the electrical switch 532 .

Figure 6 illustrates an embodiment of the driver circuit configured for enabling a test of the second EGA 220 of the AEG presented in Fig . 5A-5B . For this purpose , the additional voltage source terminal 531 is configured for being connected, via an electrical switch 631 to the second supply voltage terminal 221 of the second EGA 220 . As shown via Fig . 5A, 6 , and 7 , the same additional voltage source terminal 531 , i . e . the same additional voltage source , might be used for testing both the first EGA 210 and the second EGA 220 , wherein the first EGA 210 is connected to the positive terminal ( first voltage source terminal 212 ) and the second EGA 220 to the negative terminal ( second voltage source terminal 222 ) of the power source configured for powering the FPD 103 . Figure 7 combines the features of the driver circuits presented in Fig . 5A and in Fig . 6 , the driver circuit of Fig . 7 comprising all features of the driver circuits of Fig . 5A and 6 , the additional voltage source terminal 531 being couplable to both the first supply voltage terminal 211 and second supply voltage terminal 221 , disclosing thus a driver circuit which enables to successively test the first EGA 210 and then the second EGA 220 ( or inversely) by connecting successively the first supply voltage terminal 211 ( test of the first EGA) and then the second supply voltage terminal 221 ( test of the second EGA) to the additional voltage source terminal 531 ( or inversely) . The additional voltage source terminal 531 is typically a positive terminal of an additional voltage source preferentially comprised within the testing system according to the invention .

Figure 8 discloses a preferred embodiment of a testing system according to the invention that is particularly fitted for maintaining said voltage di f ference between the supply voltage terminals 211 , 221 within said range of voltage values whichever the type of FPD 103 coupled to the AEG is . Indeed, it enables to test at least one , preferentially both, bistate EGA of the AEG when the latter is connected to an FPD of type I as well as when it is coupled to an FPD of type I I . Indeed, the driver circuit disclosed in Fig . 8 comprises both the features of the driver circuit disclosed in Fig . 4A and the features of the driver circuit disclosed in Fig . 7 , making it possible to test the first and/or second EGA of an AEG that is connected to an FPD 103 of type I or to an FPD of type I I .

Turning back to Figure 3 , we will describe now, in more detail and in connection with Fig . 4- 8 , a preferred embodiment of a method for automatically testing a bi-state EGA of an AEG .

At step 301 , the testing system receives a request for testing said bi-state EGA or the AEG . Said request might be sent by or via the FCP 101 . For instance , it might be automatically sent by the FCP 101 according to a predefined testing period, e . g . every two months . Preferentially, an operator may use the FCP 101 , or a remote control terminal providing remote access to and control of the FCP 101 , for sending, via the latter, a request for testing one , several , or all AEG 200 of the ESS 100 . The request might speci fy the EGA to be tested, or might speci fy the AEG to be tested . In particular, i f the request speci fies the AEG to be tested, then each bi- state EGA of said speci fied AEG has to be tested, of course , as long as the concerned bi-state EGA is connected to the testing system according to the invention . For instance , i f the request requires to test the AEG 200 illustrated in Fig . 4A, then both the first EGA 210 and second EGA 220 might be tested successively, one after another . I f said request speci fies to test the AEG 200 illustrated by Fig . 5A, then only the first EGA 210 will be tested, since the second EGA 220 is not connected to the testing system, notably to its sensing unit 410 , for testing purpose , and therefore , no measurement can be performed for testing its working . The opposite situation is illustrated by Fig . 6 , wherein only the second EGA 220 is this time connected to the sensing unit 410 and can be tested, while the first EGA 210 cannot . Finally, Fig . 7 and Fig . 8 illustrate each a preferred embodiment of an electrical scheme wherein both the first and second EGA 210 , 220 can be tested, the testing system being connected, via its driver circuit and sensing module , to both the first EGA 210 and second EGA 220 .

At step 302 , the testing system automatically launches a testing procedure for testing said bi-state EGA or preferentially each bi-state EGA of the AEG . According to the present invention, the reception, by the testing system, of said request automatically triggers the launching, by its processing unit 420 , of said testing procedure for testing said bi-state EGA or each bi-state EGA of the AEG . Preferentially, i f the AES comprises several bi-state EGAs connected to the testing system for testing purpose , then said bi-state EGAs are tested one after another by running said testing procedure. In this case, the testing procedure is thus repeated for each bi-state EGA of the AEG. The testing procedure might be stored in a memory of the testing system according to the invention, and is configured for defining the different steps that have to be carried out by the processing unit for testing the bi-state EGA of the AEG. Preferentially, if the testing system is, as shown in Fig. 8, configured for testing one or each bi-state EGA of an AEG configured for being coupled to an FPD of type I, as well of an AEG configured for being coupled to an FPD of type II, then said testing procedure might comprise steps that are specific to the type of FPD that is coupled to the AEG. Thus, depending on the type of FPD 103 coupled to the AEG to be tested, the testing system may store different testing procedures, and carry out the testing procedure appropriate for the FPD connected to the AEG. For instance, it will carry out a first testing procedure for testing one or each bi-state EGA of an AEG connected to an FPD 103 of type I, and a second testing procedure for testing one or each bi-state EGA of an AEG connected to an FPD 103 of type II. The processing unit 420 might automatically determine which testing procedure to apply (e.g. the first or second testing procedure) from a measurement, via its sensing unit 410, of the voltage at the supply voltage terminals 211, 221, before launching the testing procedure. Indeed, if the FPD 103 is not powered, then the processing unit 420 automatically determines that the FPD 103 is of type I, while, if it is powered according to a predefined nominal voltage, then it is of type II.

The testing procedure will be explained now in connection with the Figures 4A-4C and 5A-5B. Let's suppose that the request indicates to test the AEG 200 presented in Fig. 4A or 5A. Then, the testing procedure comprises :

At step 303 , the processing unit 420 is configured for putting the bi-state EGA that has to be tested in its activated state while controlling one or several electrical components of the driver circuit for maintaining, between the supply voltage terminals of the AEG to which said tested bi-state EGA belongs to , e . g . between the first voltage terminal 210 and the second voltage terminal 220 , a voltage di f ference within a range of values configured for keeping the FED 103 deactivated .

In the case of the testing system disclosed in Fig . 4A, the FPD 103 is of type I : the electrical switches 231 and 232 are open, no current is flowing to the FPD 103 and the latter is thus deactivated . In this case , according to said testing procedure , the processing unit 420 will put the first bi- state EGA 210 in its activated state by closing the electrical switch 231 of the first EGA 210 as shown in Figure 4B, while closing at the same time the electrical switch 431 of the driver circuit , connecting thus the first voltage source terminal 212 to the second supply voltage terminal 221 . Due to this , the potentials at the first and at the second supply voltage terminals are identical , since said first and second supply voltage terminals are both connected to the same first voltage source terminal 212 during the test of the first EGA 210 . The voltage di f ference is thus zero , which enables to keep the FPD 103 in its deactivated state while the first EGA 210 is tested . In particular, at the same time , i . e . during said test of the first EGA 210 , the second EGA 220 remains in its deactivated state : the electrical switch 232 of the second EGA 220 remains open during the test of the first EGA 210 , as well as the electrical switch 432 configured for connecting the second voltage source terminal 222 to the first supply voltage terminal 211 .

In the case of the testing system disclosed in Fig . 5A, the FPD 103 is of type I I : the electrical switches 231 and 232 are closed, current is flowing to the FPD 103 and the latter is thus deactivated . Activation will take place by cutting of f its powering . In the case of an AEG coupled to an FPD 103 of type I I , the testing procedure comprises putting, by the processing unit 420 , the first bi-state EGA 210 in its activated state by opening the electrical switch 231 as shown in Figure 5B, while closing at the same time the electrical switch 531 of the driver circuit and keeping the second EGA 220 in its deactivated state , i . e . with the electrical switch 232 closed . The closing of the electrical switch 531 is configured for putting the first supply voltage terminal 211 at the potential of the additional voltage source terminal 531 . Due to this , the potential di f ference between the first and second supply voltage terminals remains within a range of values that are suf ficient for maintaining the FPD 103 empowered so that it does not change its state during said test , while being at the same time di f ferent from the potential di f ference that would be measured when the first voltage source terminal 212 would connect said first supply voltage terminal 211 .

At step 304 , the processing unit 420 automatically launches a voltage measurement of the voltage delivered at least at the supply voltage terminal of the tested bi-state EGA. According to Fig . 4B, which shows the driver circuit electrical components during the test of the first EGA 210 for an AEG connected to an FPD 103 of type I , the sensing unit 410 is connected to a first measurement point 411 at the first supply voltage terminal 211 for measuring, during the test, the voltage delivered at the first supply voltage terminal 211, i.e. the potential difference between said first measurement point 411 with respect to a reference potential, for instance the ground. At the same time, and optionally, the sensing unit 410 may measure the voltage at a second measurement point 412 located at the second supply voltage terminal 221, and by taking said reference potential as reference. According to Fig. 5B which shows the driver circuit electrical components during the test of the first EGA 210 for an AEG connected to an FPD 103 of type II, the sensing unit 410 is connected to a first measurement point 411 at the first supply voltage terminal 211 for measuring, during the test, the voltage delivered at the first supply voltage terminal 211 and measured with respect to said reference potential. Optionally, the sensing unit 410 may acquire, via the third measurement point 413 located between the anode of the diode 535 and the resistor 533, an additional voltage measurement for determining the state, open or close, of the electrical switch 532. This additional voltage measurement provides a monitoring of the working of the electrical switch 532 (i.e. it enables to determine whether it works correctly or not) without impacting the working of the first EGA 210.

At step 305, the processing unit 420 receives the voltage value (s) measured during said voltage measurement ( s ) , and detects or determines, at step 306 and from the received voltage value (s) , whether there is a failure of the tested bistate ECA(s) . For this purpose, the processing unit 420 can be configured for comparing the received voltage measurement value (s) with predefined voltage values. In particular, according to the embodiment presented in Fig. 4B, the processing unit 420 is configured for determining whether the voltage value measured at the first measurement point 411 is within a predefined range of values capable of activating the FPD 103 in case of fire safety hazard . It can thus control that the electrical switch 231 is working properly and that the voltage provided by the first voltage source terminal 212 is within the appropriate predefined range of values for activating the FPD 103 . Said predefined range of values might be stored in a memory of the testing system . Optionally, from the voltage measurement acquired from the second measurement point 412 , the processing unit might be configured for determining whether the electrical switch 431 is correctly closed ( same voltage value as in the first measurement point 411 ) or not ( di f ferent voltage value compared to the first measurement point 411 ) . At the end, the testing system may report to the FCP and/or, preferentially, to the user at the origin of said request , the result of the test , indicating for instance whether the measured value at the first measurement point 411 is within or outside said range of predefined values , meaning that the first EGA 210 is working correctly, or respectively, that a failure of the first EGA 210 occurred .

In particular, according to the embodiment presented in Fig . 5B, the processing unit 420 is configured for determining whether the voltage value measured with respect to said reference potential at the first measurement point 411 corresponds to the potential of the additional voltage source terminal 531 , indicating that the opening of the electrical switch 231 correctly took place when activating the first EGA 210 . Optionally, the processing unit 420 might further determine whether the potential at the third measurement point 413 is equal to the potential of said additional voltage source terminal 531 , which indicates , in the af firmative , the correct closing of the electrical switch 532 . The testing system may thus determine whether the electrical switch 231 works correctly when activating the first EGA 210 and whether the voltage supplied by the activated first EGA 210 at its first supply voltage terminal enables an activation of the FED 103 . Again, the testing system may report the result of the test to the FCP 101 and/or in particular to the user at the origin of the received request .

I f the AEG 200 comprises another bi-state EGA connected to the testing system, then the testing system is preferentially configured for testing successively each bi-state EGA. For instance , Figures 4A-4C show an AEG 200 comprising two bi- state EGAs , wherein the second bi-state EGA 220 is also connected to the testing system for testing purpose . The testing procedure will be as follows : after completion of the test of the first EGA 210 , the processing unit 420 automatically launches the test of the second EGA 220 . According to Fig . 4A-4C, the FPD 103 is of type I . In order to keep a voltage value between the first and second supply voltage terminals 211 and 221 that will prevent an activation of the FPD 103 during the test of the second EGA 220 , the processing unit 420 is configured for closing the electrical switch 432 when activating the second EGA 220 , wherein said activation closes the electrical switch 232 of the second ESP 220 . At the same time , the first EGA 210 remains deactivated ( i . e . its electrical switch 231 remains open) , and the driver circuit electrical switch 431 configured for connecting the first voltage source terminal 212 to the second supply voltage terminal 221 remains also open . The result is that the first and second supply voltage terminals 211 and 221 are at the same potential of the second voltage source terminal 222 , for instance the ground 242 . Therefore , the FPD 103 remains in its deactivated state while the working of the electrical switch 232 and the control of the voltage outputted via the second supply voltage terminal 221 can be checked via voltage monitoring by the sensing unit 410 via the second measurement point 412 and optionally the first measurement point 411 . At the end, the result of the test might be transmitted to the FCP and/or user at the origin of the request : i f the voltage measured at the second measurement point 412 with respect to the potential reference is within the range of values expected for the potential delivered by the second voltage source 222 , then the testing system reports a correct working of the second EGA 220 . Otherwise , it will report a failure of the latter .

According to Fig . 5A-5B, the AEG 200 comprises also a second EGA 220 , but the latter is not connected to the testing system . Therefore , after completion of the testing procedure for the first EGA 210 , the testing system will report the result ( s ) of the test to the FCP and/or user at the origin of the testing request , and the test of the AEG will be completed .

According to Fig . 6 , the AEG 200 is connected to an FPD 103 of type I I . It comprises a first EGA 210 and a second EGA 220 , wherein only the second EGA 220 is connected to the testing system . Therefore , contrary to Fig . 5A-5B, the testing system can only test the second EGA 220 . The testing procedure of this second EGA 220 will be explained in connection with Fig . 7 . Indeed, the latter comprises both the features of the testing system according to Fig . 5A-5B and the features of the testing system according to Fig . 6 , enabling thus to test both the first EGA 210 and the second EGA 220 . The processing unit 420 can as well start testing the first or second EGA, and after completion, continue with the test of the EGA which was not yet tested . Regarding Fig . 6 and 7 , the testing procedure of the second EGA 220 is the same for both embodiments , since they share the same electrical scheme for the connection of the testing system, i . e . its driver circuit and its sensing unit , to the second EGA 220 . The testing procedure of the second EGA 220 is as follows : the FPD 103 is of type I I and shall remain empowered during the test of the second EGA 220 . For this purpose , the processing unit 420 is configured for activating the second EGA 220 , which will open the electrical switch 232 of the second EGA 220 and it will at the same time close the electrical switch 631 configured for connecting the second supply voltage terminal 221 to the additional voltage source terminal 531 . During this test , the first EGA 210 remains deactivated, that is , its electrical switch 231 remains closed, and the electrical switch 532 configured for connecting the additional voltage source terminal 531 to the first supply voltage terminal 211 remains open . The potential of the additional voltage source terminal 531 is set , e . g . by the processing unit 420 , for being within a range of potential values that will keep a potential di f ference between the first and second supply voltage terminals 211 and 221 configured for maintaining the FPD 103 deactivated . In particular, the processing unit 420 may automatically select the outputted potential V_T at the additional voltage source terminal 531 in function of the EGA to be tested, using for instance a first potential V_T = VI for testing the first EGA 210 and a second potential V_T = V2 for the second EGA 220 . Preferentially, a same potential V_T delivered by the additional voltage source terminal 531 might be used for testing both the first and second EGA, e . g . V_T = 0 . 5 -V_deact . The sensing unit 10 is then configured for measuring the voltage , with respect to a reference potential , at the second measurement point 412 , that is the voltage delivered at the second supply voltage terminal 221 , and/or at a fourth measurement point 414 located between the second voltage source terminal 222 and the electrical switch 232 of the second EGA 220 , enabling thus the processing unit 420 to determine , from the voltage values acquired by the sensing unit 410 whether the electrical switch 232 is correctly opened when the second EGA is activated .

Finally, as already explained, the driver circuit of the preferred embodiment illustrated in Fig . 8 comprises both the features of the driver circuit disclosed in Fig . 4A and the features of the driver circuit disclosed in Fig . 7 . In such a case , the method may comprise first a determination, by the processing unit 420 , and on the basis of a voltage measurement at the first and second measurement points 411 and 412 , whether the FED 103 connected to the AEG is of type I or type I I . Then, in function of the type of the FED 103 , the processing unit 420 is then configured for automatically carrying out the method steps previously described in connection with Fig . 4A-4C i f the FED is of type I , and the method steps described in connection with Fig . 5A-5B, - i f the FED is of type I I , making it possible to test the first and/or second EGA of the AEG whatever the type of FED 103 connected to the

AEG .

To summari ze , the present invention proposes a method and a testing system for automatically testing a bi-state EGA of an AEG which enable to test the correct working of such an AEG without activating the FED connected to the latter . Said method and testing system enable to carry out a testing procedure for testing one or both bi-state EGAs of the AEG while the FED remains connected to the AEG and in its deactivated state . List of abbreviations :

FSS Fire Safety System

FD Fire Detector FPD Fire Protection Device

FCP Fire Control Panel

AEC Activation Electrical Circuit

RM Remote Module

ECA Electrical Circuit Arrangement