ENCODING/DECODING SYSTEM FOR PARALLEL DATA

WIPO Patent Application WO/2014/045906

A1

The purpose of the present invention is to set the redundancy dynamically, thereby making erasure correction possible even during degeneracy operations, as well as reducing the number of parallel media necessary. In this encoding/decoding system for parallel data, multiple lanes are used for parallel data transfer from an encoding machine to a decoding machine. The encoding machine encodes the products of elements of an encoding vector M of the symbols of each lane and a state vector U indicating the validity of the symbols, and transmits the state vector U, together with a transmission vector Y obtained through the encoding. The decoding machine uses a received reception vector Y', the received state vector U, and a disappearance vector E indicating whether elements of the transmission vector have disappeared in the course of the transmission/reception interval, and decodes a subset Msub composed of valid elements of the encoding vector M.

YAMADA YOSHIAKI (JP)
TESHIMA MITSUHIRO (JP)
KITAMURA KEI (JP)
HISADOME KENJI (JP)

PCT/JP2013/074097

March 27, 2014

September 06, 2013

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NIPPON TELEGRAPH & TELEPHONE (JP)

H03M13/15; H03M7/30

WO2013093993A1

2013-06-27

JP2011004207A	2011-01-06
JP2011146932A	2011-07-28
JP2012247575A	2012-12-13

YOSHIAKI YAMADA ET AL.: "Novel variable coding rate FEC for elastic optical networks and its implementations and evaluations on GPU", TECHNICAL REPORT OF IEICE, vol. 112, no. 486, 7 March 2013 (2013-03-07), pages 193 - 198

SHIGA INTERNATIONAL PATENT OFFICE (JP)
Patent business corporation Shiga international patent firm (JP)

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