Title:
SYSTEM VERIFICATION DEVICE, SYSTEM VERIFICATION METHOD, AND SYSTEM VERIFICATION PROGRAM
Document Type and Number:
WIPO Patent Application WO/2022/239060
Kind Code:
A1
Abstract:
A system verification device 1 is provided with: a management unit 11 that, by using log data of a processing system constructed in a verification environment, manages a function status regarding an execution situation of a function of the processing system; a determination unit 12 that determines whether or not a value based on the function status satisfies a condition value for application to an actual performance environment; and a renewal unit 13 that, when the value based on the function status satisfies the condition value for application to the actual performance environment, switches the function of the processing system to the actual performance environment.
More Like This:
| JP5595329 | User interface designing device |
| JP2008071110 | SOURCE RECORD REVIEW SUPPORTING DEVICE |
| JPS62179033 | IC MICROPROCESSOR |
Inventors:
ISHIZUKA YUICHIRO (JP)
SAKATA KOSUKE (JP)
SATO RYOSUKE (JP)
SUTO YUICHI (JP)
SAKATA KOSUKE (JP)
SATO RYOSUKE (JP)
SUTO YUICHI (JP)
Application Number:
PCT/JP2021/017693
Publication Date:
November 17, 2022
Filing Date:
May 10, 2021
Export Citation:
Assignee:
NIPPON TELEGRAPH & TELEPHONE (JP)
International Classes:
G06F11/36; G06F8/65; G06F11/34
Foreign References:
| JP2020030506A | 2020-02-27 | |||
| JP2016189087A | 2016-11-04 | |||
| JP2005250732A | 2005-09-15 | |||
| JP2006099393A | 2006-04-13 | |||
| JP2010231488A | 2010-10-14 |
Attorney, Agent or Firm:
MIYOSHI Hidekazu et al. (JP)
Download PDF: