Temperature Device Formation

CROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of priority under 35 U.S.C. § 119 of U.S.

Provisional Application Serial No. 62/677381 filed on May 29, 2018, the content of which is relied upon and incorporated herein by reference in its entirety.

FIELD OF THE INVENTION

[0002] Embodiments are related to systems and methods for forming devices that include both high temperature components and low temperature components.

BACKGROUND

[0003] Manufacturing of electronics devices often involves forming electronics on a substrate. Different electronics can be formed at relatively low temperature, while other electronics require substantially higher temperatures. The manufacture of thin film transistors (TFT) can be done at relatively low temperatures such as, for example, less than six hundred (600) degrees Celsius (C). Such relatively low temperatures are well within the thermal capacities of many cost effective substrates. In contrast, the manufacture of high quality micro light emitting diodes (micro LEDs) can require processing temperatures well above nine hundred (900) degrees C. These temperatures exceed the temperature capacity of many substrates, and thus limit substrates that can be used. Lower temperature manufacture of micro-LEDs has been attempted, but has generally not resulted in high quality micro- LEDs.

[0004] Hence, for at least the aforementioned reasons, there exists a need in the art for advanced systems and methods for manufacturing electronic devices. SUMMARY

[0005] Embodiments are related to systems and methods for forming devices that include both high temperature components and low temperature components.

[0006] This summary provides only a general outline of some embodiments. The phrases “in one embodiment,”“according to one embodiment,” "in various embodiments", "in one or more embodiments", "in particular embodiments" and the like generally mean the particular feature, structure, or characteristic following the phrase is included in at least one embodiment, and may be included in more than one embodiment. Importantly, such phrases do not necessarily refer to the same embodiment. Many other embodiments will become more fully apparent from the following detailed description, the appended claims and the accompanying drawings.

BRIEF DESCRIPTION OF THE FIGURES

[0007] A further understanding of the various embodiments of the present invention may be realized by reference to the figures which are described in remaining portions of the specification. In the figures, like reference numerals are used throughout several figures to refer to similar components. In some instances, a sub-label consisting of a lower case letter is associated with a reference numeral to denote one of multiple similar components. When reference is made to a reference numeral without specification to an existing sub-label, it is intended to refer to all such multiple similar components.

[0008] Fig. 1 is a flow diagram showing a method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments;

[0009] Figs. 2a-2e show a subset of processing steps in accordance with one or more embodiments including placement of high temperature electronic devices followed by formation of low temperature electronic devices consistent with the method shown in Fig. 1;

[0010] Fig. 3 is a flow diagram showing another method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments; [0011] Figs. 4a-4f show a subset of processing steps in accordance with one or more embodiments including placement of high temperature electronic devices in wells within a substrate followed by formation of low temperature electronic devices consistent with the method shown in Fig. 3;

[0012] Fig. 5 is a flow diagram showing another method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments;

[0013] Figs. 6a-6l show a subset of processing steps in accordance with one or more embodiments including predefmition of vias, placement of high temperature electronic devices in wells within a substrate followed by formation of low temperature electronic devices, and completion of the vias consistent with the method shown in Fig. 5;

[0014] Figs. 7a-7b show two examples of bottom transmission displays that may be made in accordance with different embodiments discussed herein;

[0015] Fig. 8 is a flow diagram showing a method for manufacturing articles including both high temperature and low temperature electronic devices using a severable substrate in accordance with some embodiments; and

[0016] Figs. 9a-9f show a subset of processing steps in accordance with one or more embodiments including placement of high temperature electronic devices followed by formation of low temperature electronic devices consistent with the method shown in Fig. 8.

DETAILED DESCRIPTION OF SOME EMBODIMENTS

[0017] Embodiments are related to systems and methods for forming devices that include both high temperature components and low temperature components.

[0018] Various embodiments provide methods for making a system including a plurality of high temperature electronic devices and at least one low temperature electronic device. Such methods include: providing a substrate; locating each of the plurality of high temperature electronic devices at respective locations on the substrate; and subsequent to locating the plurality of high temperature electronic devices on the substrate, locating the at least one low temperature electronic device over the substrate. In some cases, the methods additionally include forming or placing at least one low temperature electronic device and/or low temperature structure on the substrate prior to placing the locating each of the plurality of high temperature electronic devices at respective locations on the substrate.

[0019] In some instances of the aforementioned embodiments, the methods further include forming an electrical trace over the substrate that electrically couples the at least one low temperature electronic device to at least one of the plurality of high temperature electronic devices. In various instances of the aforementioned embodiments, the substrate is made of a transparent material. In some instances, the substrate is made of glass material, glass-ceramic material, ceramic material, metal material, or polymer material. In various instances of the aforementioned embodiments, the each of the plurality of high temperature devices is a micro LED, an LED, an micro-driver integrated circuit (IC), and/or an IC, and the at least one low temperature electronic device is an LED driver circuit, a semiconductor device, a nonlinear electrical or optical element, a sensor, a element that converts between electrical, optical, thermal, or mechanical energy.

[0020] In some instances of the aforementioned embodiments, the methods further include forming a plurality of openings in the first material layer that extend only partially into the substrate. In some such instances, locating each of the plurality of high temperature electronic devices at respective locations on the substrate includes locating each of plurality of high temperature electronic devices in a respective one of the plurality of openings. In some cases, locating the at least one low temperature electronic device over the substrate includes locating the at least one low temperature electronic device in one of the plurality of openings. The openings can have a linear or nonlinear bottom and sidewalls.

[0021] In various instances of the aforementioned embodiments, the substrate is a laminated substrate including at least a first material layer attached to a first surface of the core material such that a second surface of the first material layer is in contact with the first surface of the core material and at least a portion of a first surface of the first material layer is exposed. In such instances, the methods may further include forming a plurality of openings in the first material layer that extend through to the core material. Further, locating each of the plurality of high temperature electronic devices at respective locations on the substrate includes locating each of plurality of high temperature electronic devices in a respective one of the plurality of openings. [0022] In some cases, locating the at least one low temperature electronic device over the substrate includes locating the at least one low temperature electronic device in one of the plurality of openings. In some such cases, locating the at least one low temperature electronic device over the substrate includes forming the at least one low temperature electronic device using thin film transistor process directly in one of the plurality of openings. In other cases, locating the at least one low temperature electronic device over the substrate includes locating the at least one low temperature electronic device on the first layer material. In some such cases, locating the at least one low temperature electronic device over the substrate includes forming the at least one low temperature electronic device using thin film transistor process directly on the first material layer. Alternatively, there might be

intermediate layers between the low temperature electronic device and the first material layer.

[0023] Other embodiments provide electronic systems that include: a laminated substrate having a first material layer clad to a core material; a plurality of high temperature electronic devices in contact with the core material and within openings in the first material layer; at least one low temperature electronic device on the same side of the core material as the first material layer; and an electrical trace electrically coupling the at least one low temperature electronic device to at least one of the high temperature electronic devices. In some cases, at least one of the first material layer or the second material layer is non-transparent. In various cases, the core material is transparent. In some cases, the second material layer is not present.

[0024] In various instances of the aforementioned embodiments, the at least one low temperature electronic device is formed using thin film transistor process directly on one of: the first material layer, the core material within an opening in the first material layer, or a planarized surface over the first material layer. In some cases, the first layer is a planarizing layer. In various instances of the aforementioned embodiments, the each of the plurality of high temperature devices is a micro LED, an LED, an micro-driver integrated circuit (IC), and/or an IC, and the at least one low temperature electronic device is an LED driver circuit, a thin-film transistor, a nonlinear electrical or optical element, a sensor, a element that converts between electrical, optical, thermal, or mechanical energy. In some such instances, the electronic system is a bottom transmission display, and wherein light emitted from each of the plurality of micro LEDs transmits through the core material. [0025] In some instances of the aforementioned embodiments, the laminated substrate further includes a second material layer attached to a second surface of the core material such that a second surface of the second material layer is in contact with the second surface of the core material and at least a portion of a first surface of the second material layer is exposed. The core material is one of a glass material, a glass-ceramic material, a ceramic material, a metal material, or a polymer material. The first material layer is made of a glass material, a glass-ceramic material, a ceramic material, a metal material, or a polymer material. The second material layer is made of a glass material, a glass-ceramic material, a ceramic material, a metal material, or a polymer material.

[0026] As used herein, the phrase "transparent substrate" is used in its broadest sense to mean any workpiece formed from a material that is sufficiently transparent to allow for at least some light emitted from a laser or LED light source to pass through the substrate. As an example, a transparent substrate may be, but is not limited to, a workpiece made of a material with an optical absorption of less than about twenty percent (20%) per millimeter depth. As another example, a transparent substrate may be, but is not limited to, a workpiece made of a material with an optical absorption of less than about ten percent (10%) per millimeter depth for a specified pulsed laser wavelength. As yet another example, a transparent substrate may be, but is not limited to, a workpiece made of a material with an optical absorption of less than about one percent (1%) per millimeter depth for a specified pulsed laser wavelength. A transparent substrate can be made of glass, glass ceramic, ceramic, polymer, or other material depending upon the particular application, and may consist of a single layer of a single material, a composite, or a multi-layer stack of different or the same materials. If the substrate is a multi-layer stack, a layer in the substrate can be delaminated from the rest of the substrate either after device fabrication or as a step during device fabrication. The substrate can be a rigid sheet or a flexible substrate compatible with roll-to-roll processing. As used herein, the term "substrate" unmodified by the term "transparent" can refer to a transparent substrate as previously described, and can also include materials having any degree of transparency or opaqueness with respect to light from any source or wavelength. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of substrates and/or transparent substrates that may be used in relation to different embodiments.

[0027] As used herein, the phrase "transparent material is used in its broadest sense to mean anv material with an ootical absorotion of less than about twentv oercent (20%) oer millimeter depth. Further, as used herein, the phrase "non-transparent material" is used in its broadest sense to mean any material with an optical absorption of greater than or equal to about twenty percent (20%) per millimeter depth.

[0028] As used herein, the phrase "electronic device" is used in its broadest sense to mean any devices that includes an active electronic circuit including, but not limited to, a transistor, a semiconductor device, or a switch. An electronic device includes other structures besides deposited conductor and dielectric materials. Thus, an electronic device may be included in, but is not limited to, a thin film transistor; an organic LED; an LED; a photovoltaic; nonlinear electronic elements; elements that convert electricity to light, sound, or mechanical motion; sensors; elements that convert light or mechanical motion to electrical energy, or a micro LED. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of electronic devices (either fully or partially formed) that may be used in relation to different embodiments.

[0029] As used herein, the phrases "low temperature device" or "low temperature electronic device" are used in their broadest sense to mean any device or electronic device that can be manufactured at temperatures within the thermal capacity of the substrate (i.e., temperatures at which the substrate remains mechanically and/or chemically stable) on which they are either formed, placed, or deposited. As used herein, the phrases "high temperature device" or "high temperature electronic device" are used in their broadest sense to mean any device or electronic device that are manufactured at temperatures that exceed the thermal capacity of the substrate on which they are either formed, placed, or deposited.

[0030] As used herein, the term "via" is used in its broadest sense to include any opening extending into a surface, such as, but not limited to, through hole vias, blind vias, or other bulk features that can be predefined before fabrication of electronic devices on the surface of the transparent substrate. Such predefmition before fabrication may include, but is not limited to, creating a pattern corresponding to a latent via that is subsequently processed into a formed via.

[0031] The terms“substantial,”“substantially,” and variations thereof as used herein are intended to note that a described feature is equal or approximately equal to a value or description. For example, a“substantially planar” surface is intended to denote a surface that is planar or approximately planar. Moreover, as defined above,“substantially similar” is intended to denote that two values or conditions are equal or approximately equal. In some embodiments,“substantially similar” may denote values within about 10% of each other, such as within about 5% of each other, or within about 2% of each other.

[0032] Unless otherwise expressly stated, it is in no way intended that any method set forth herein be construed as requiring that its steps be performed in a specific order. Accordingly, where a method claim does not actually recite an order to be followed by its steps or it is not otherwise specifically stated in the claims or descriptions that the steps are to be limited to a specific order, it is no way intended that any particular order be inferred.

[0033] Turning to Fig. 1, a flow diagram 100 shows a method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments. Following flow diagram 100, a laminated substrate is provided (block 105). The laminated substrate includes a first layer attached to a first side of a core material and a second layer attached to a second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate where the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material.

Alternatively, the laminated substrate can be glass core layer and a polymer first layer.

Likewise, the second layer can also be a polymer materials, glass, other material, or not present at all leaving a two-layer stack. Alternatively, the substrate can be a single layer of uniform material, a composite, or material with gradient composition. Although the layer is referred to as laminated, multiple methods can be used to form the layer including lamination, solution-based coating, deposition, forming from a melt.

[0034] The materials of the first layer, the second layer and the core material are selected for a variety of reasons including, but not limited to, mechanical integrity at expected processing and/or operational temperatures of the overall laminated substrate, optical absorption of the overall laminated substrate, alkali characteristics of the respective components, differential etch rates between the first layer, the second layer, and/or the core material, thermal expansion characteristics of the overall laminated substrate, and/or flexibility of the overall laminated substrate. For example, where a bottom transmission display (i.e., a display where light is displayed through the substrate layer(s) as shown in Figs. 7a- 7b) is being created, materials exhibiting low optical absorption may be selected to yield a transparent substrate. As another example, where TFTs are to be formed on the substrate, non-alkali containing materials for one or more of the first layer, the second layer or the core material may be selected. In the case where TFTs (and micro LEDs) do not contact the core material, but contact is limited to the first layer, the first layer may be a non alkali containing material while the core material is an alkali containing material. As another example where a bottom transmission display is being manufactured, different doping of one or more of the first layer, the second layer, and/or the core material may be applied to further govern light emission from the display. In various embodiments, the material of the first layer is the same as the material for the second layer. In other embodiments, the material of the first layer is different from the material for the second layer. In other embodiments, the laminated substrate does not include a second layer. In particular cases, the core material exhibits a coefficient of thermal expansion that is greater than either the material of the first layer or the material of the second layer.

[0035] A laminated substrate provides some strength advantages where the strength of the laminated substrate is substantially retained even after the laminated substrate is exposed to scratching or abrasions. That said, while Fig. 1 is discussed as using a laminated substrate having a core material sandwiched between two clad layers, other embodiments may use a substrate made of a single material. As an example a single layer of glass may be provided where surfaces along a top side and a bottom side of the glass are exposed. Further, other embodiments with only one layer laminated to a core material layer are also possible. In yet other embodiments, four or more material layers can be laminated together to make a laminated substrate. As examples, these laminated layers can be combined with the core material permanently or temporarily. If temporarily, the laminated layer can be separated from at least one of the other layers during device processing or after. For example, the first layer can be a polymer material and the core layer can be a glass material with no second layer. It should be noted that although the layers are described as laminated, the first layer and other layers can be applied to the core material in a variety of methods such as lamination, solution coating, or forming from a melt as examples.

[0036] In some embodiments, laminated glass is used to form the laminated glass substrate. The laminated glass can be alkali free making it compatible with formation of TFTs on the surface thereof. Further, such laminated glass exhibits greater retained strength when compared with typical display glass materials. This increase in retained strength after abrasion orovides a benefit where disolav tiling is used and also to overall reliabilitv of the end product. While the aforementioned examples discuss applications using specific substrate materials, other substrate materials are possible in accordance with other

embodiments. For example, embodiments using high purity fused silica substrates where one or all of the layers are made of high purity fused silica are possible. Such high purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

[0037] Example substrates can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrates have a thickness of less than two millimeters (2 mm).

In other cases, the substrates have a thickness of less than one millimeter (1 mm). In yet other cases, the substrates have a thickness of less than seven tenths of a millimeter (0.7 mm). In yet other cases, the substrates have a thickness of less than five tenths of a millimeter (0.5 mm). In yet other cases, the substrates have a thickness of less than three tenths of a millimeter (0.3 mm). In yet other cases, the substrates have a thickness of less than two tenths of a millimeter (0.2 mm). In yet other cases, the substrates have a thickness of less than one tenth of a millimeter (0.1 mm). Where the substrate is a laminated substrate, the ratio of the thickness of a clad layer (e.g., the first layer) to the core (e.g., the core material) may be adjusted to create a desired combination of attributes including, but not limited to, strength, overall optical absorption, and well formation where the core is used as an etch stop material. The substrate size can, for example, also be (A) a wafer with, for example, a three hundred millimeter (300mm) diameter, a three hundred fifty millimeter (350mm) diameter, or a four hundred millimeter (400mm) diameter, (B) a web with a width of less than three thousand millimeters (3000mm), and a length of greater than thirty meters (30m), or (C) a sheet with a linear dimension greater than three hundred millimeters (300mm). The substrate can, for example, also have a linear dimension or diameter in the range of three hundred millimeters to four thousand millimeters (300 mm to 4000 mm). The aforementioned are example substrate configurations, and based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of other substrate configurations that are possible in accordance with different embodiments. In some embodiments, an example substrate may also have UV transmission properties that enable backside exposure during electronic device fabrication. In some embodiments, an example substrate may also be black glass to facilitate the design of micro LED devices in a top emission format. In some embodiments, an example substrate may also be black glass to facilitate the design of micro LED devices in a top emission format. [0038] Turning to Fig. 2a, one example of a laminated substrate 200 is shown as having a core material 205 with a first layer 206 attached to one side of core material 205 and a second layer 207 attached to an opposite side of core material 205. Laminated substrate 200 includes a first surface 210 extending along first layer 206, and a second surface 215 extending along second layer 207.

[0039] Returning to Fig. 1, high temperature electronic devices are placed on a surface of at least the first layer (block 110). Such high temperature electronic devices are formed apart from the laminated substrate, and the manufactured high temperature electronic devices are placed at defined locations on the substrate of the first layer. Alternatively, the high temperature electronic devices can be placed on the core layer. This would be the case if the substrate does not have a first layer. The high temperature electronic devices can also be located on other layers of the substrate. By manufacturing the high temperature electronic devices separate from the laminated substrate, a laminated substrate can be chosen which is not capable of withstanding the high temperature processing of the high temperature electronic devices. Such high temperature electronic devices may be, but are not limited to micro LEDs, LEDs, micro-driver ICs, IC chips. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of high temperature electronic devices that may be used in relation to different embodiments. Placement of the high temperature electronic devices may be done using any process known in the art including, but not limited to, pick-and-place processing capable of placing individual electronic devices at desired locations on the substrate, by stamp-based transfer printing, or by applying a material layer incorporating the high temperature electronic devices to the surface of the laminated substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of process that may be used to place high temperature electronic devices on a substrate. Turning to Fig. 2b, laminated substrate 200 is shown as having a number of high temperature electronic devices 239 placed on surface 210 of first layer 206.

[0040] Continuing with flow diagram 100 of Fig. 1, a planarizing material is formed over a combination of the high temperature electronic devices and the first layer of the laminated substrate, and an exposed surface of the planarizing material is smoothed to leave an outer surface that is sufficiently planar to allow for formation of low temperature electronic devices thereon (block 115). In some cases, the first layer is not present. In some cases, the ulanarizins material is an insulator that not onlv allows for ulanarizins. but also acts as a passivation layer. The planarizing material is formed over the laminated substrate without disturbing the locations of the high temperature electronic devices. In some cases, the planarizing material is a transparent epoxy or silicon material. Examples of other planarizing materials include sol-gel, spin-on-glass, polyimide. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize other materials that may be used as planarizing materials in accordance with other embodiments.

[0041] Turning to Fig. 2c, laminated substrate 200 is shown with a planarizing layer 240 formed over high temperature electronic devices 239 placed on surface 210 of first layer 206. Planarizing layer 240 has been smoothed to an extent that high temperature electronic devices 239 are exposed through the planarizing layer. In other embodiments, high temperature electronic devices 239 are encapsulated in planarizing layer 240 covering the devices.

[0042] Returning to Fig. 1, low temperature electronic devices are formed on at least the planarizing layer (block 120). Forming the low temperature electronic devices may include, but is not limited to, forming TFTs on the planarizing layer using processes known in the art for forming TFTs on top of a substrate. As just one example, the high temperature electronic devices may include a micro LED and one of the low temperature electronic devices may be a circuit for driving the micro LED.

[0043] As the low temperature electronic devices are formed at temperatures below those used to form the high temperature electronic devices and below temperatures at which the laminated substrate becomes unstable, the low temperature electronic devices can be manufactured directly on the substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of low temperature electronic devices that can be formed on the planarizing layer in accordance with different embodiments. These include structures that include semiconductor, nonlinear electronic, nonlinear optic, materials that convert energy between electrical, optical, thermal, mechanical forms. Also, based upon the disclosure provided herein, one of ordinary skill in the art will recognize that the low temperature electronic devices can be formed only on the planarizing layer, only on one of the exposed high temperature electronic devices, or partially on each of the planarizing layer and at least one of the exposed high temperature electronic devices. In other situations, the low temperature electronic device can be formed on the substrate side opposite of the high temperature electronic devices. Alternatively, the high temperature electronic devices can be formed on either or both sides of the substrate, and the low temperature electronic devices can be formed on either or both sides of the substrate.

[0044] Turning to Fig. 2d, laminated substrate 200 is shown with low temperature electronic devices 242 formed over planarizing layer 240. In particular, each of the low temperature electronic devices 242 overlap a portion of both planarizing layer and respective high temperature electronic devices 239. In other examples, the low temperature devices do not directly overlap the high temperature devices.

[0045] Returning to Fig. 1, electrically conductive traces are formed that connect low temperature electronic devices and/or high temperature electronic devices (block 125).

Forming the electrically conductive traces may be done using any process known in the art. As one example, forming the electrically conductive traces includes depositing a layer of metal over exposed portions of the planarizing layer, the low temperature electronic devices, and the high temperature electronic devices. Subsequently, the layer of metal is patterned and etched to leave metal only where traces are desired. Alternatively, the semi-additive process that the pattemized metal is further thickened by post-plating or post electrodeless plating to form electrically conductive traces with appropriate electrical conductance that less thermal dissipation occurred. Alternatively, additive processes such as printing can be used to form the electrically conductive traces. Turning to Fig. 2e. laminated substrate 200 is shown with conductive traces 260 connecting various of low temperature electronic devices 242 and high temperature electronic devices 239.

[0046] Turning to Fig. 3, a flow diagram 300 shows another method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments. Following flow diagram 300, a laminated substrate is provided (block 305). The laminated substrate includes a first layer attached to a first side of a core material and a second layer attached to a second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate where the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material. Alternative material systems are also possible.

[0047] The materials of the first layer, the second layer and the core material are selected for a variety of reasons including, but not limited to, mechanical integrity at expected processing and/or operational temperatures of the overall laminated substrate, optical absorption of the overall laminated substrate, alkali content of the respective components, differential etch rates between the first layer, the second layer, and/or the core material, thermal expansion characteristics of the overall laminated substrate, and/or flexibility of the overall laminated substrate. For example, where wells are to be formed in the first layer of the laminated substrate to receive deposited high temperature electronic devices, the material of the first layer may be selected to have an etch rate in a selected etchant that is much higher than the etch rate of the core material in the same selected etchant. This allows the core material to operate as an etch stop layer resulting in precise well depths and/or very flat well bottoms. As another example, where a bottom transmission display (i.e., a display where light is displayed through the substrate as shown in Figs. 7a-7b) is being created, materials exhibiting low optical absorption may be selected to yield a transparent substrate. As another example, where TFTs are to be formed on the substrate, non-alkali containing materials for one or more of the first layer, the second layer or the core material may be selected. In the case where TFTs do not contact the core material, but contact is limited to the first layer, the first layer may be a non-alkali containing material while the core material is an alkali containing material. As another example where a bottom transmission display is being manufactured, different doping of one or more of the first layer, the second layer, and/or the core material may be applied to further govern light emission from the display. In some cases, one or more of the first layer, the second layer, and/or the core are black. In various embodiments, the material of the first layer is the same as the material for the second layer.

In other embodiments, the material of the first layer is different from the material for the second layer. In particular cases, the core material exhibits a coefficient of thermal expansion that is greater than either the material of the first layer or the material of the second layer.

[0048] A laminated substrate provides some strength advantages where the strength of the laminated substrate is substantially retained even after the laminated substrate is exposed to scratching or abrasions. That said, while Fig. 3 is discussed as using a laminated substrate having a core material sandwiched between two clad layers, other embodiments may use a substrate made of a single material. As an example a single layer of glass may be provided where surfaces along a top side and a bottom side of the glass are exposed. Further, other embodiments with only one layer laminated to a core material layer are also possible. In yet other embodiments, four or more material layers can be laminated together to make a laminated substrate. [0049] In some embodiments, laminated glass is used to form the laminated glass substrate. The laminated glass can be alkali free making it compatible with formation of TFTs on the surface thereof. Further, such laminated glass exhibits greater retained strength when compared with typical display glass materials. This increase in strength provides a benefit where display tiling is used and also to overall reliability of the end product. While the aforementioned examples discuss applications using specific substrate materials, other substrate materials are possible in accordance with other embodiments. For example, embodiments using high purity fused silica substrates where one or all of the layers are made of high purity fused silica are possible. Such high purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

[0050] Example substrates can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrates have a thickness of less than two millimeters (2 mm).

In other cases, the substrates have a thickness of less than one millimeter (1 mm). In yet other cases, the substrates have a thickness of less than seven tenths of a millimeter (0.7 mm). In yet other cases, the substrates have a thickness of less than five tenths of a millimeter (0.5 mm). In yet other cases, the substrates have a thickness of less than three tenths of a millimeter (0.3 mm). In yet other cases, the substrates have a thickness of less than two tenths of a millimeter (0.2 mm). In yet other cases, the substrates have a thickness of less than one tenth of a millimeter (0.1 mm). Where the substrate is a laminated substrate, the ratio of the thickness of a clad layer (e.g., the first layer) to the core (e.g., the core material) may be adjusted to create a desired combination of attributes including, but not limited to, strength, overall optical absorption, and well formation where the core is used as an etch stop material. The substrate size can, for example, also be (A) a wafer with, for example, a three hundred millimeter (300mm) diameter, a three hundred fifty millimeter (350mm) diameter, or a four hundred millimeter (400mm) diameter, (B) a web with a width of less than three thousand millimeters (3000mm), and a length of greater than thirty meters (30m), or (C) a sheet with a linear dimension greater than three hundred millimeters (300mm). The substrate can, for example, also have a linear dimension or diameter in the range of three hundred millimeters to four thousand millimeters (300 mm to 4000 mm). The aforementioned are example substrate configurations, and based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of other substrate configurations that are possible in accordance with different embodiments. In some embodiments, an example substrate may also have UV transmission properties that enable backside exposure during electronic device fabrication.

[0051] Turning to Fig. 4a, one example of a laminated substrate 400 is shown as having a core material 405 with a first layer 406 attached to one side of core material 405 and a second layer 407 attached to an opposite side of core material 405. Laminated substrate 400 includes a first surface 410 extending along first layer 406, and a second surface 415 extending along second layer 407.

[0052] Returning to Fig. 3, a mask defining well locations is formed over at least the first layer of the laminated substrate (block 310). Forming the mask may include applying a photo mask material to the exposed surface of the first layer, and subsequently patterning and developing the photo mask material leaving openings at locations where wells are to be formed in the first layer of the laminated substrate. Any process known in the art for forming such a mask over the first layer may be used in relation to the embodiments discussed herein. Turning to Fig. 4b, one example of a laminated substrate 400 is shown as having a mask 435 formed over first layer 406. As shown, mask 435 includes openings 433 exposing surface 410 of first layer 406.

[0053] Continuing with flow diagram 300 of Fig. 3, the first layer is etched through the openings in the mask to define wells extending into the surface of laminated substrate, and once the wells are formed the mask is removed (block 315). In some cases, the etch is performed by exposing the first layer to hydrofluoric acid (HF). In one particular case, a 1.45M hydrofluoric acid (HF) solution held at eight degrees Celsius (8°C) is used to perform the etch process. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of etchants that may be used in relation to different embodiments of the present disclosure. For example, as an alternative to an HF solution, mineral acid such as 1.58M nitric acid (HN03) may be used. Depending upon the particular design, the size of the wells may be between five square micrometers (5mm ² ) and four hundred square micrometers (400mm ² ). In some embodiments, the size of the wells may be between ten square micrometers (lOmm ² ) and two hundred square micrometers (200mm ² ).

[0054] The etch process may be continued for a defined period to allow wells to extend to a depth in the first layer, but not extend to the core material. This may be done where, for example, the core material is an alkali containing material and semiconductor electronic devices are to be formed in the wells. In other cases, the core material may be less susceptible to etching than the first layer and in such cases the etch process may continue for a time sufficient to expose the core material at the locations of the wells. As the core material is less susceptible to etching it effectively acts as an etch stop. This approach results in an advantage of flat bottom wells where the bottom of the wells correspond to an upper surface of the core material. Further, the etching process may be tuned to yield substantially vertical well sidewalls. Where, on the other hand, the substrate is a single material layer, the etch process may be continued for a defined period to allow wells to extend to a depth in the first layer, but not extend to the core material.

[0055] Turning to Fig. 4c, one example of a laminated substrate 400 is shown that has wells 437 etched into first layer 406 and extending to an upper layer of core material 405. In this example, the bottom of wells 437 is core material layer 405. Where semiconductor electronic devices are to be placed and/or formed in wells 405, both the material of first layer 406 and core material 405 are non-alkali containing materials. Alternatively, the surface feature may be formed using a laser exposure and etch process. In this case, the laser exposure and etch steps can follow each other sequentially or follow each other but with additional process steps occurring between them.

[0056] Returning to Fig. 3, high temperature electronic devices are placed in at least some of the previously formed wells (block 320). Such high temperature electronic devices are formed apart from the laminated substrate, and the manufactured high temperature electronic devices are placed within at least a subset of the wells. By manufacturing the high temperature electronic devices separate from the laminated substrate, a laminated substrate can be chosen which is not capable of withstanding the high temperature processing of the high temperature electronic devices. Such high temperature electronic devices may be, but are not limited to micro LEDs, LEDs, micro-driver ICs, and/or IC chips. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of high temperature electronic devices that may be used in relation to different embodiments.

Placement of the high temperature electronic devices may be done using any process known in the art including, but not limited to, pick-and-place processing capable of placing individual electronic devices in selected wells, by stamp-based transfer printing, or by gravity fed processes (e.g., micro-fluidics) using the wells to trap the high temperature electronic devices at desired locations. In some cases an adhesion material mav be deuosited in the bottom of the wells to secure the high temperature electronic devices in place. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of process that may be used to place high temperature electronic devices in the wells. Turning to Fig. 4d, laminated substrate 400 is shown as having a number of high temperature electronic devices 439 placed in previously formed wells 437 within first layer 406.

[0057] Continuing with flow diagram 300 of Fig. 3, a planarizing material is formed over a combination of the high temperature electronic devices and the first layer of the substrate, and an exposed surface of the planarizing material is smoothed to leave an outer surface that is sufficiently planar to allow for formation of low temperature electronic devices thereon (block 315). In some cases, the planarizing material is an insulator that is not only used for planarizing, but also acts as a passivation layer. The planarizing material is formed over the laminated substrate without disturbing the locations of the high temperature electronic devices. In some cases, the planarizing material is a transparent epoxy or silicon material. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize other materials that may be used as planarizing materials in accordance with other embodiments.

[0058] Turning to Fig. 4e, laminated substrate 400 is shown with a planarizing layer 440 formed over high temperature electronic devices 439 placed on surface 410 of first layer 406. Planarizing layer 440 has been smoothed, but at least some depth of the planarizing material is formed over the high temperature electronic devices 439 such that high temperature electronic devices 439 are encapsulated in planarizing layer 440. In other embodiments, the planarizing material has been smoothed to the extent that high temperature electronic devices 439 are exposed through the planarizing layer.

[0059] In some cases, a metal redistribution layer encased in the planarizing material may be formed over the planarizing layer to provide for electrical interconnect between high temperature electronic devices and/or low temperature electronic devices that are

formed/placed in the subsequent operation. The advantages of the process include the elimination of making vias in glass substrate and the following copper (Cu) metallization process in any interconnect vias, which could reduce manufacturing cost. Moreover, it also reduces the concern on copper (Cu) contamination during device fabrication process that may encounter with copper (Cu) filled through glass vias (TGVs). [0060] Returning to Fig. 3, low temperature electronic devices are formed on at least the planarizing layer (block 330). Forming the low temperature electronic devices may include, but is not limited to, forming TFTs on the planarizing layer using processes known in the art for forming TFTs on top of a substrate. As just one example, the high temperature electronic devices may include a micro LED and one of the low temperature electronic devices may be a circuit for driving the micro LED.

[0061] As the low temperature electronic devices are formed at temperatures below those used to form the high temperature electronic devices and below temperatures at which the laminated substrate becomes unstable, the low temperature electronic devices can be manufactured directly on the substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of low temperature electronic devices that can be formed on the planarizing layer in accordance with different embodiments. Also, based upon the disclosure provided herein, one of ordinary skill in the art will recognize that the low temperature electronic devices can be formed only on the planarizing layer, only on one of the exposed high temperature electronic devices, or partially on each of the planarizing layer and at least one of the exposed high temperature electronic devices. In other situations, the low temperature electronic device can be formed on the substrate side opposite of the high temperature electronic devices. Alternatively, the high temperature electronic devices can be formed on either or both sides of the substrate, and the low temperature electronic devices can be formed on either or both sides of the substrate.

[0062] Turning to Fig. 4f, laminated substrate 400 is shown with low temperature electronic devices 442 formed over a metal redistribution layer 480 and planarizing layer 440. In particular, each of low temperature electronic devices 442 overlap a portions of high temperature electronic devices 439.

[0063] Returning to Fig. 3, electrically conductive traces are formed that connect low temperature electronic devices and/or high temperature electronic devices via a metal redistribution layer encapsulated in the planarizing material (block 325). Forming the electrically conductive traces may be done using any process known in the art. As one example, forming the electrically conductive traces includes depositing a layer of metal over exposed portions of the planarizing layer, the low temperature electronic devices, and the high temperature electronic devices. Subsequently, the layer of metal is patterned and etched to leave metal only where traces are desired. Alternatively, an additive process can be used where the electrically conductive traces are printed.

[0064] Turning to Fig. 5, a flow diagram 500 shows another method for manufacturing articles including both high temperature and low temperature electronic devices in accordance with some embodiments. Following flow diagram 500, a laminated substrate is provided (block 505). The laminated substrate includes a first layer attached to a first side of a core material and a second layer attached to a second side of the core material. In some embodiments, the laminated substrate is a laminated glass substrate where the first layer is a first glass layer, the second layer is a second glass layer, and the core material is a glass core material. Alternatively, the layers can be selected from glass ceramic, ceramic, metal, and polymer materials.

[0065] The materials of the first layer, the second layer and the core material are selected for a variety of reasons including, but not limited to, mechanical integrity at expected processing and/or operational temperatures of the overall laminated substrate, optical absorption of the overall laminated substrate, alkali characteristics of the respective components, differential etch rates between the first layer, the second layer, and/or the core material, thermal expansion characteristics of the overall laminated substrate, and/or flexibility of the overall laminated substrate. For example, where wells are to be formed in the first layer of the laminated substrate to receive deposited high temperature electronic devices, the material of the first layer may be selected to have an etch rate in a selected etchant that is much higher than the etch rate of the core material in the same selected etchant. This allows the core material to operate as an etch stop layer resulting in precise well depths and/or very flat well bottoms. As another example, where a bottom transmission display (i.e., a display where light is displayed through the substrate as shown in Figs. 7a- 7b) is being created, materials exhibiting low optical absorption may be selected to yield a transparent substrate. As another example, where TFTs are to be formed on the substrate, non-alkali containing materials for one or more of the first layer, the second layer or the core material may be selected. In the case where TFTs do not contact the core material, but contact is limited to the first layer, the first layer may be a non-alkali containing material while the core material is an alkali containing material. As another example where a bottom transmission display is being manufactured, different doping of one or more of the first layer, the second laver. and/or the core material mav be aDulied to further govern light emission from the display. In various embodiments, the material of the first layer is the same as the material for the second layer. In other embodiments, the material of the first layer is different from the material for the second layer. In particular cases, the core material exhibits a thermal expansion that is greater than either the material of the first layer or the material of the second layer.

[0066] A laminated substrate provides some strength advantages where the strength of the laminated substrate is substantially retained even after the laminated substrate is exposed to scratching or abrasions. That said, while Fig. 5 is discussed as using a laminated substrate having a core material sandwiched between two clad layers, other embodiments may use a substrate made of a single material. As an example a single layer of glass may be provided where surfaces along a top side and a bottom side of the glass are exposed. Further, other embodiments with only one layer laminated to a core material layer are also possible. In yet other embodiments, four or more material layers can be laminated together to make a laminated substrate.

[0067] In some embodiments, laminated glass is used to form the laminated glass substrate. The laminated glass can be alkali free making it compatible with formation of TFTs on the surface thereof. Further, such laminated glass exhibits greater retained strength when compared with typical display glass materials. This increase in retained strength provides a benefit where display tiling is used and also to overall reliability of the end product. While the aforementioned examples discuss applications using specific substrate materials, other substrate materials are possible in accordance with other embodiments. For example, embodiments using high purity fused silica substrates where one or all of the layers are made of high purity fused silica are possible. Such high purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C.

[0068] Example substrates can, for example, have a thickness of less than three millimeters (3 mm). In some cases, the substrates have a thickness of less than two millimeters (2 mm). In other cases, the substrates have a thickness of less than one millimeter (1 mm). In yet other cases, the substrates have a thickness of less than seven tenths of a millimeter (0.7 mm). In yet other cases, the substrates have a thickness of less than five tenths of a millimeter (0.5 mm). In yet other cases, the substrates have a thickness of less than three tenths of a millimeter (0.3 mm). In yet other cases, the substrates have a thickness of less than two tenths of a millimeter (0.2 mm). In yet other cases, the substrates have a thickness of less than one tenth of a millimeter (0.1 mm). Where the substrate is a laminated substrate, the ratio of the thickness of a clad layer (e.g., the first layer) to the core (e.g., the core material) may be adjusted to create a desired combination of attributes including, but not limited to, strength, overall optical absorption, and well formation where the core is used as an etch stop material. The substrate size can, for example, also be (A) a wafer with, for example, a three hundred millimeter (300mm) diameter, a three hundred fifty millimeter (350mm) diameter, or a four hundred millimeter (400mm) diameter, (B) a web with a width of less than three thousand millimeters (3000mm), and a length of greater than thirty meters (30m), or (C) a sheet with a linear dimension greater than three hundred millimeters (300mm). The substrate can, for example, also have a linear dimension or diameter in the range of three hundred millimeters to four thousand millimeters (300 mm to 6000 mm). The aforementioned are example substrate configurations, and based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of other substrate configurations that are possible in accordance with different embodiments. In some embodiments, an example substrate may also have UV transmission properties that enable backside exposure during electronic device fabrication.

[0069] Turning to Fig. 6a, one example of a laminated substrate 600 is shown as having a core material 605 with a first layer 606 attached to one side of core material 605 and a second layer 607 attached to an opposite side of core material 605. Laminated substrate 600 includes a first surface 610 extending along first layer 606, and a second surface 615 extending along second layer 607.

[0070] Returning to Fig. 5, the laminated substrate is exposed to a laser light source at multiple locations corresponding to future vias through the laminated substrate (block 510). This exposure to photonic energy from the laser light source changes at least one

characteristic of the laminated substrate along defined paths extending from the first surface of the laminated substrate to the second surface of the laminated substrate. In some embodiments, the laser light source is from a laser capable of quasi-non-diffracting drilling (e.g., Gauss-Bessel or Bessel beam drilling). In some cases, the characteristic of the transparent substrate that is changed by exposure to the laser light source is density caused by a melting of the substrate along the defined paths. In various cases, the characteristic of the material that is changed bv exoosure to the laser light source is refractive index which mav be changed with or without a density change. Such defined paths may be alternatively referred to as "damage tracks" extending through the transparent substrate. By changing, for example, the density of the material along a defined path from the first surface of the transparent substrate to a second surface of the transparent substrate, the transparent substrate along the defined paths is made more susceptible to etching relative to other areas of the substrate. In some cases, an etch ratio of 9: 1 (i.e., a rate of etch of the defined path is nine times greater than the rate of etch for areas of the transparent substrate surrounding the defined paths) is achieved. As the laminated substrate is sufficiently transparent to allow photonic energy from the laser light source to pass through, the change in characteristic of the laminated substrate along the defined paths is substantially uniform from the first surface to the second surface of the laminated substrate. In some cases, the aforementioned defined paths are compatible with thermal cycles and process conditions used for fabricating electronic devices disposed over the transparent substrate. Turning to Fig. 6b, one example of a laminated substrate 600 is shown as having a predefined paths (or damage tracks) 630 extending through the laminated substrate.

[0071] Following Fig. 500 of Fig. 5, a mask defining well locations is formed over at least the first layer of the laminated substrate (block 515). Forming the mask may include applying a photo mask material to the surface of the first layer, and subsequently patterning and developing the photo mask material leaving openings at locations where wells are to be formed in the first layer of the laminated substrate. Any process known in the art for forming such a mask over the first layer may be used in relation to the embodiments discussed herein. Turning to Fig. 6c, one example of a laminated substrate 600 is shown as having a mask 635 formed over first layer 606. As shown, mask 635 includes openings 633 exposing surface 610 of first layer 606. Alternatively, this etch mask may not be present.

[0072] Continuing with flow diagram 500 of Fig. 5, the first layer is etched through the openings in the mask to define wells extending into the surface of laminated substrate, and once the wells are formed the mask is removed (block 520). Alternatively, the first layer is etched directly without a mask present and wells are defined by the location of the previous laser exposure. In some cases, the etch is performed by exposing the first layer to

hydrofluoric acid (HF). In one particular case, a 1.45M hydrofluoric acid (HF) solution held at eight degrees Celsius (8°C) is used to perform the etch process. Based upon the disclosure orovided herein one of ordinary skill in the art will recosnize a variety of etchants that mav be used in relation to different embodiments of the present disclosure. For example, as an alternative to an HF solution, mineral acid such as 1.58M nitric acid (HN03) may be used. Depending upon the particular design, the size of the wells may be between five square micrometers (5mm ² ) and four hundred square micrometers (400mm ² ). In some

embodiments, the size of the wells may be between ten square micrometers (lOmm ² ) and two hundred square micrometers (200mm ² ).

[0073] The etch process may be continued for a defined period to allow wells to extend to a depth in the first layer, but not extend to the core material. This may be done where, for example, the core material is an alkali containing material and semiconductor electronic devices are to be formed in the wells. In other cases, the core material may be less susceptible to etching than the first layer and in such cases the etch process may continue for a time sufficient to expose the core material at the locations of the wells. As the core material us less susceptible to etching it effectively acts as an etch stop. This approach results in an advantage of flat bottom wells where the bottom of the wells correspond to an upper surface of the core material. Further, the etching process may be tuned to yield substantially vertical well sidewalls. Where, on the other hand, the substrate is a single material layer, the etch process may be continued for a defined period to allow wells to extend to a depth in the first layer, but not extend to the core material.

[0074] Turning to Fig. 6d, one example of a laminated substrate 600 is shown that has wells 637 etched into first layer 606 and extending to an upper layer of core material 605. In this example, the bottom of wells 637 is core material layer 605. Where semiconductor electronic devices are to be placed and/or formed in wells 605, both the material of first layer 606 and core material 605 are non-alkali containing materials.

[0075] Returning to Fig. 5, high temperature electronic devices are placed in at least some of the previously formed wells (block 525). Such high temperature electronic devices are formed apart from the laminated substrate, and the manufactured high temperature electronic devices are placed within at least a subset of the wells. By manufacturing the high temperature electronic devices separate from the laminated substrate, a laminated substrate can be chosen which is not capable of withstanding the high temperature processing of the high temperature electronic devices. Such high temperature electronic devices may be, but are not limited to micro LEDs. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of high temperature electronic devices that may be used in relation to different embodiments. Placement of the high temperature electronic devices may be done using any process known in the art including, but not limited to, pick- and-place processing capable of placing individual electronic devices in selected wells, by stamp-based transfer printing, or by gravity fed processes (e.g., micro-fluidics) using the wells to trap the high temperature electronic devices at desired locations. In some cases, an adhesion material may be deposited in the bottom of the wells to secure the high temperature electronic devices in place. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of process that may be used to place high temperature electronic devices in the wells. Turning to Fig. 6e, laminated substrate 600 is shown as having a number of high temperature electronic devices 639 placed in previously formed wells 637a, 637b, 637d, and 637e within first layer 606. This leaves well 637c unoccupied.

[0076] Continuing with flow diagram 500 of Fig. 5, a planarizing material is formed over areas of the first glass layer that includes the high temperature electronics (block 530). In some cases, the planarizing material is an insulator that not only provides a material for planarizing, but also acts as a passivation layer. The planarizing material is formed over the laminated substrate without disturbing the locations of the high temperature electronic devices. Further, the planarizing material leaves some wells that are not filled with high temperature electronic devices exposed. This process may be a single step deposit, or a multistep deposit and etch. In some cases, the planarizing material is a transparent epoxy or silicon material. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize other materials that may be used as planarizing materials in accordance with other embodiments.

[0077] Turning to Fig. 6f, laminated substrate 600 is shown with a planarizing layer 640 formed over high temperature electronic devices 639 placed on surface 610 of first layer 606. Planarizing layer 640 does not cover well 637c which is unoccupied.

[0078] Returning to Fig. 5, low temperature electronic devices are formed (or placed) within one or more unoccupied wells (block 535). Forming the low temperature electronic devices may include, but is not limited to, forming TFTs in the unoccupied wells using processes known in the art for forming TFTs on a substrate. Alternatively, the low temperature electronic devices may be placed in the unoccupied wells using, for example, a pick-and-place process. As just one example, the high temperature electronic devices may include a micro LED and one of the low temperature electronic devices may be a circuit for driving the micro LED.

[0079] As the low temperature electronic devices are formed at temperatures below those used to form the high temperature electronic devices and below temperatures at which the laminated substrate becomes unstable, the low temperature electronic devices can be manufactured directly on the substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of low temperature electronic devices that can be formed on the planarizing layer in accordance with different embodiments. Also, based upon the disclosure provided herein, one of ordinary skill in the art will recognize that the low temperature electronic devices can be formed only on the planarizing layer, only on one of the exposed high temperature electronic devices, or partially on each of the planarizing layer and at least one of the exposed high temperature electronic devices.

[0080] The planarizing material is then placed over the low temperature electronic devices (block 540). This may include placing the planarizing material only over the areas of the first layer that include the low temperature electronics devices, or may include covering all of the areas of the first layer with the planarizing layer. It should be noted that forming the planarizing material over the low temperature electronic devices is not necessary, and may be used where design restraints demand it. Turning to Fig. 6g, laminated substrate 600 is shown with a low temperature electronic device 642 formed or placed within well 637c, and all of high temperature electronic devices 639 and low temperature device 642 locked in place by the planarizing layer 640.

[0081] Continuing with flow diagram 500 of Fig. 5, an exposed surface of the planarizing material is smoothed to leave an outer surface that is substantially planar (block 545). In some cases, the planarizing material is an insulator that not only provides a material for planarizing, but also acts as a passivation layer. The planarizing material is formed over the laminated substrate without disturbing the locations of the high temperature electronic devices. In some cases, the planarizing material is a transparent epoxy or silicon material. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize other materials that may be used as planarizing materials in accordance with other embodiments. [0082] Turning to Fig. 6h, laminated substrate 600 is shown with a planarizing layer 640 formed over high temperature electronic devices 639 and low temperature electronic device 642 on surface 610 of first layer 606. Planarizing layer 640 has been smoothed, but a at least some depth of the planarizing material is formed over the high temperature electronic devices 639 and low temperature electronic device 642 such that they are encapsulated in planarizing layer 640. In other embodiments, the planarizing material has been smoothed to the extent that high temperature electronic devices 639 and/or low temperature electronic device 642 are exposed through the planarizing layer.

[0083] Returning to Fig. 5, interconnect vias are formed and a metal redistribution layer encased in the planarizing material may be formed over the planarizing layer to provide for electrical interconnect between high temperature electronic devices and/or low temperature electronic devices (block 550). The advantages of the process include the elimination of making vias in glass substrate and the following copper (Cu) metallization process in any interconnect vias, which could reduce manufacturing cost. Moreover, it also reduces the concern on copper (Cu) contamination during device fabrication process that may encounter with copper (Cu) filled through glass vias (TGVs). Turning to Fig. 6i, laminated substrate 600 is shown with a planarizing layer 640 and a metal redistribution layer 680 formed over high temperature electronic devices 639 and low temperature electronic device 642.

[0084] Returning to Fig. 5, a protective coating is formed over the planarizing layer and the second layer of the laminated substrate (block 655). This protective coating may be patterned to form an etch mask that includes openings through which the locations where vias have been predefined are exposed. Other areas are covered and thus not exposed to the etchant.

[0085] Turning to Fig. 6j, laminated substrate 600 is shown with a protective coating 648 formed over planarizing layer 640 and second layer 607 of laminated substrate 600.

Openings 650 corresponding to locations where vias were predefined (i.e., predefined paths 630) are formed in protective coating 648 through which second layer 607 of laminated substrate 600 and planarizing layer 640 are exposed to an etchant.

[0086] The planarizing layer and the laminated substrate is etched using an etchant that removes the material changed along the respective paths extending from the first surface of the laminated substrate to the second surface of the laminated substrate at a much higher rate than other materials are removed (block 560). This etching process is continued until vias extending through the laminated substrate are opened at each of the respective paths through the laminated substrate.

[0087] While the embodiment of Fig. 5 is discussed as resulting in vias etched from both sides and resulting in an hourglass shaped opening extending from the first surface to the second surface, other types of vias a possible by changing the etch process. For example, blind vias may be formed by etching only from one surface for a period that is insufficient to make an opening extending from the first surface to the second surface. Such blind vias may extend most of the way through the laminated substrate (e.g., leaving an un-etched portion extending from the surface opposite that to which the etchant is applied of less than five micrometers (5 pm)). The advantage of such an approach is that one surface (i.e., the surface opposite that to which the etchants is applied) remains untouched or undamaged by exposure to the etchant. In this manner, the through-hole via location can be predefined by a blind- via structure, and subsequently finished only after the pristine nature of the un-etched surface is no longer needed. Turning to Fig. 6k, laminated substrate 600 is shown with a protective coating 648 formed over planarizing layer 640 and second layer 607 of laminated substrate 600. Through hole vias 652 are have been etched through openings 650 in protective coating 648. Alternatively, the delayed etch process can be used to create well structures in the laminated glass that the high temperature devices or other components are placed.

[0088] Continuing with flow diagram 500 of Fig. 5, the protective coating is removed from the surfaces of the planarizing layer and the laminated substrate (block 565). Turning to Fig. 61, laminated substrate 600 is shown after the etching process with vias 652 extending from first surface 610 to second surface 615, and removal of all of the protective coating.

[0089] Turning to Fig. 7a, a bottom transmission display 700 is shown that may be made in accordance with different embodiments discussed herein. Bottom transmission display 700 includes a laminated substrate including a core material 705 sandwiched between a first layer 706 and a second layer 707. All of core material 705, and the materials of first layer 706 and second layer 707 are transparent. Micro LEDs 739 transmit photonic energy 750 into first layer 706, through the laminated substrate, and out second layer 707.

[0090] Turning to Fig. 7b, another bottom transmission display 701 is shown that may be made in accordance with different embodiments discussed herein. Similar to bottom transmission display 700, to bottom transmission display 701 includes a laminated substrate including core material 705 sandwiched between first layer 706 and second layer 707. In contrast to bottom transmission display 700, only core material 705 and the material of first layer 706 are transparent. Openings 760 are etched in second layer 707 to allow second layer 707 to be made of a non-transparent material. Micro LEDs 739 transmit photonic energy 750 into first layer 706, through the laminated substrate, and out openings 760 in second layer 707. Similarly, where micro LEDs are placed in openings formed in first layer 706 such that transmission of photonic energy from micro LEDs does not need to pass through first layer 706, first layer 706 may be made of a non-transparent material. Alternative configurations include only have the core layer itself transparent, or having only the core layer transparent and the first layer not present.

[0091] Turning to Fig. 8, a flow diagram 800 shows a method for manufacturing articles including both high temperature and low temperature electronic devices over a severable pair of substrates in accordance with some embodiments. Following flow diagram 800, a severable substrate is provided (block 805). The severable substrate includes a first substrate with a first surface, where the first surface of the first substrate is attached to a surface of a second substrate.

[0092] The materials of the first substrate and the second substrate are selected for a variety of reasons including, but not limited to, mechanical integrity at expected processing and/or operational temperatures of the overall severable substrate, optical absorption of the overall laminated substrate, alkali characteristics of the respective components, differential etch rates between the first substrate and the second substrate, thermal expansion characteristics of the overall severable substrate, and/or flexibility of the overall severable substrate; thermal expansion characteristics of the first substrate, and/or flexibility of the first substrate. For example, where a bottom transmission display (i.e., a display where light is displayed through the substrate as shown in Figs. 7a-7b) is being created, materials exhibiting low optical absorption may be selected for the first substrate to yield a transparent substrate. As another example, where TFTs are to be formed on the substrate, non-alkali containing materials for one or more of the first layer, the second layer or the core material may be selected. In various embodiments, the material of the first substrate is the same as the material for the second substrate. In other embodiments, the material of the first substrate is different from the material for the second substrate. [0093] In some embodiments, the first substrate is made of laminated glass to create a multi-layer substrate on top of the second substrate. The laminated glass can be alkali free making it compatible with formation of TFTs on the surface thereof. Further, such laminated glass exhibits greater retained strength when compared with typical display glass materials. This increase in retained strength after abrasion provides a benefit where display tiling is used and also to overall reliability of the end product. While the aforementioned examples discuss applications using specific substrate materials, other substrate materials are possible in accordance with other embodiments. For example, embodiments using high purity fused silica substrates where one or all of the layers are made of high purity fused silica are possible. Such high purity fused silica has a thermal expansion coefficient of about 0.5 ppm/C. Turning to Fig. 9a, one example of a severable substrate 900 is shown as having a first substrate 906 with a first layer 915 and a second layer 910. First layer 915 is attached to one side of a second substrate 905.

[0094] Returning to Fig. 8, high temperature electronic devices are placed on a surface of the first substrate (block 810). Such high temperature electronic devices are formed apart from the laminated substrate, and the manufactured high temperature electronic devices are placed at defined locations on the substrate of the first layer. Alternatively, the high temperature electronic devices can be placed on the core layer. This would be the case if the substrate does not have a first layer. The high temperature electronic devices can also be located on other layers of the substrate. By manufacturing the high temperature electronic devices separate from the laminated substrate, a laminated substrate can be chosen which is not capable of withstanding the high temperature processing of the high temperature electronic devices. Such high temperature electronic devices may be, but are not limited to micro LEDs, LEDs, micro-driver ICs, IC chips. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of high temperature electronic devices that may be used in relation to different embodiments. Placement of the high temperature electronic devices may be done using any process known in the art including, but not limited to, pick-and-place processing capable of placing individual electronic devices at desired locations on the substrate, by stamp-based transfer printing, or by applying a material layer incorporating the high temperature electronic devices to the surface of the laminated substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of process that may be used to place high temperature electronic devices on a substrate. Turning to Fig. 9b, severable substrate 900 is shown as having a number of high temperature electronic devices 939 placed on surface 910 of first layer 906.

[0095] Continuing with flow diagram 800 of Fig. 8, a planarizing material is formed over a combination of the high temperature electronic devices and the second surface of the first substrate, and an exposed surface of the planarizing material is smoothed to leave an outer surface that is sufficiently planar to allow for formation of low temperature electronic devices thereon (block 815). In some cases, the planarizing material is an insulator that not only provides a material for planarizing, but also acts as a passivation layer. The planarizing material is formed over the laminated substrate without disturbing the locations of the high temperature electronic devices. In some cases, the planarizing material is a transparent epoxy or silicon material. Examples of other planarizing materials include sol-gel, spin-on-glass, polyimide. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize other materials that may be used as planarizing materials in accordance with other embodiments.

[0096] Turning to Fig. 9c, laminated substrate 900 is shown with a planarizing layer 940 formed over high temperature electronic devices 939 placed on surface 910 of first layer 906. Planarizing layer 940 has been smoothed to an extent that high temperature electronic devices 939 are exposed through the planarizing layer. In other embodiments, high temperature electronic devices 939 are encapsulated in planarizing layer 940 covering the devices.

[0097] Returning to Fig. 8, low temperature electronic devices are formed on at least the planarizing layer (block 820). Forming the low temperature electronic devices may include, but is not limited to, forming TFTs on the planarizing layer using processes known in the art for forming TFTs on top of a substrate. As just one example, the high temperature electronic devices may include a micro LED and one of the low temperature electronic devices may be a circuit for driving the micro LED.

[0098] As the low temperature electronic devices are formed at temperatures below those used to form the high temperature electronic devices and below temperatures at which the severable substrate becomes unstable, the low temperature electronic devices can be manufactured directly on the substrate. Based upon the disclosure provided herein, one of ordinary skill in the art will recognize a variety of low temperature electronic devices that can be formed on the planarizing layer in accordance with different embodiments. These include structures that include semiconductor, nonlinear electronic, nonlinear optic, materials that convert energy between electrical, optical, thermal, mechanical forms. Also, based upon the disclosure provided herein, one of ordinary skill in the art will recognize that the low temperature electronic devices can be formed only on the planarizing layer, only on one of the exposed high temperature electronic devices, or partially on each of the planarizing layer and at least one of the exposed high temperature electronic devices. In other situations, the low temperature electronic device can be formed on the substrate side opposite of the high temperature electronic devices. Alternatively, the high temperature electronic devices can be formed on either or both sides of the substrate, and the low temperature electronic devices can be formed on either or both sides of the substrate.

[0099] Turning to Fig. 9d, severable substrate 900 is shown with low temperature electronic devices 942 formed over planarizing layer 940. In particular, each of the low temperature electronic devices 942 overlap a portion of both planarizing layer and respective high temperature electronic devices 939. In other examples, the low temperature electronic devices 942 do not directly overlap the high temperature electronic devices 939.

[00100] Returning to Fig. 8, electrically conductive traces are formed that connect low temperature electronic devices and/or high temperature electronic devices (block 825).

Forming the electrically conductive traces may be done using any process known in the art. As one example, forming the electrically conductive traces includes depositing a layer of metal over exposed portions of the planarizing layer, the low temperature electronic devices, and the high temperature electronic devices. Subsequently, the layer of metal is patterned and etched to leave metal only where traces are desired. Alternatively, additive processes such as printing can be used to form the electrically conductive traces. Turning to Fig. 9e. severable substrate 900 is shown with conductive traces 960 connecting various of low temperature electronic devices 942 and high temperature electronic devices 939.

[00101] Returning to Fig. 8, first substrate including: the high temperature electronic devices, the low temperature electronic devices, and the electrical traces is separated from the second substrate (block 830). Turning to Fig. 9f, first substrate 906 having planarizing layer 940, high temperature electronic devices 939, low temperature electronic device 942, and electrical traces 960 disposed over first surface 910 is shown after separation from the second substrate. [00102] In conclusion, the dislcosure provides novel systems, devices, methods and arrangements for making systems including a mix of high temperature electronic devices and low temperature electronic devices. While detailed descriptions of one or more embodiments have been given above, various alternatives, modifications, and equivalents will be apparent to those skilled in the art without varying from the spirit of the invention. For example the first substrate of the severable substrate may be replaced by any of the substrates discussed in relation to Figs. 1, 3 and 5, and the processes discussed in relation to Figs. 1, 3 and 5 applied to a severable substrate. Therefore, the above description should not be taken as limiting the scope of the invention, which is defined by the appended claims.