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Title:
SYSTEMS AND METHODS FOR DETECTING CAPACITOR PROCESS VARIATION
Document Type and Number:
WIPO Patent Application WO/2008/027710
Kind Code:
A3
Abstract:
A method for detecting capacitor variation in a device comprises operating an oscillator in the device, the oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test, comparing an output of the oscillator to a reference output, and evaluating variation for a plurality of capacitors in the device based on the comparing.

Inventors:
STEVENSON JAN-MICHAEL (US)
MAGNUSEN TIMOTHY M (US)
Application Number:
PCT/US2007/075671
Publication Date:
May 08, 2008
Filing Date:
August 10, 2007
Export Citation:
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Assignee:
MICROTUNE TEXAS LP (US)
STEVENSON JAN-MICHAEL (US)
MAGNUSEN TIMOTHY M (US)
International Classes:
G01R31/28
Foreign References:
US20020126792A12002-09-12
EP1596208A12005-11-16
US6285865B12001-09-04
US6784754B12004-08-31
US3626285A1971-12-07
GB2258048A1993-01-27
Attorney, Agent or Firm:
DELFACHE, Marc, L. et al. (2200 Ross AvenueSuite 280, Dallas TX, US)
Download PDF:
Claims:

CLAIMS

What is claimed is:

1. A method for detecting capacitor variation in a device, said method comprising: operating an oscillator in said device, said oscillator being an Inductive- Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test; comparing an output of said oscillator to a reference output; and evaluating variation for a plurality of capacitors in said device based on said comparing.

2. The method of claim 1 wherein said capacitor variation is the difference between a nominal value of a capacitor and an actual, after-process value of said capacitor.

3. The method of claim 1 wherein comparing said output comprises: capturing cycles of said oscillator in a counter; and outputting the contents of said counter to a computational circuit; and comparing said counter contents to a reference value by said computational circuit.

4. The method of claim 3 wherein said capturing cycles of said oscillator in said counter comprises: dividing said output of said oscillator; zeroing portions of said divided output that do not occur in a designated time period.

5. The method of claim 4 wherein said designated time period is a function of an output of a reference oscillator.

6. The method of claim 1 further comprising: receiving information associated with said calculated variation by an executing software program;

based upon said information, controlling by said software program the behavior of a filter component, said filter component including one or more of said plurality of capacitors on a same semiconductor chip as said capacitor under test.

7. The method of claim 6 wherein said filter component includes a plurality of filter elements, each said element having a different pass band, and wherein said controlling said behavior of said filter element comprises selecting at least one of said plurality of filter elements based upon its passband and said information.

8. The method of claim 1 wherein said capacitor under test is formed on a same semiconductor chip with said plurality of capacitors, said method further comprising: adjusting an operation of a circuit component in response to said evaluated variation.

9. The method of claim 1 wherein said evaluating is performed by circuit logic disposed on a same semiconductor chip with said plurality of capacitors and said capacitor under test.

10. A system for detecting capacitor variation, said system comprising: an Inductive-Capacitive (LC) oscillator, said LC oscillator including a capacitor under test and an inductor of known value; a circuit adapted to capture an output of said LC oscillator; and a computational unit adapted to compare said output with a reference output and to evaluate variation of a plurality of capacitors based thereon, said plurality of capacitors in a same device as said capacitor under test.

11. The system of claim 10 wherein said circuit comprises a divider such that said captured output is divided output.

12. The system of claim 10 further comprising a reference oscillator that defines a period for capturing said output of said LC oscillator.

13. The system of claim 12 wherein said circuit comprises a counter adapted to count cycles of said output of said LC oscillator during said period for capturing.

14. The system of claim 10 wherein said computational unit is adapted to adjust a response of a functional unit in said device based on said evaluated variation

15. The system of claim 10 wherein said computational unit is a software unit adapted to tune a filter based on said evaluated variation.

16. The system of claim 10 wherein said computational unit is a logic circuit adapted to tune a filter based on said evaluated variation.

17. A method for tuning an on-chip circuit, said method comprising: measuring a variation of a first capacitor by oscillating said first capacitor in an

Inductive-Capacitive (LC) circuit with an inductor of known value and comparing the output of the oscillator with a reference value; and adjusting a frequency response of said on-chip circuit based at least in part on said variation, said on-chip circuit including at least a second capacitor.

18. The method of claim 17 wherein said on-chip circuit is a filter.

19. The method of claim 18 wherein said filter includes a plurality of filter components, each with a different frequency response, and wherein adjusting a frequency response comprises: selecting a filter element based on said measured variation.

20. The method of claim 19 wherein said filter element is formed on a same chip as said first capacitor.

21. The method of claim 19 wherein said selecting said filter element comprises: permanently making or breaking one or more connections in said filter, thereby hardwiring said selection.

22. The method of claim 17 wherein said measuring and said adjusting are performed at power-up of a device.

23. The method of claim 17 wherein said measuring and said adjusting are performed at a change of frequency of a Radio Frequency (RF) input signal of a device.

24. The method of claim 17 wherein comparing said output comprises: capturing cycles of said LC circuit in a counter; outputting the contents of said counter to a computational circuit; and comparing said counter contents to a reference value by said computational circuit, wherein said LC circuit, said on-chip circuit, and said counter are formed on a same chip.

25. The method of claim 24 wherein adjusting a frequency response comprises: passing said measured variation to a tuning element adapted to change said frequency response.

26. The method of claim 17 wherein said on-chip circuit is a mixer controlled by a local oscillator, and wherein said adjusting a frequency response comprises: adjusting said local oscillator, thereby changing a frequency of an output signal of said mixer.

27. A method for detecting capacitor variation, said method comprising: operating an oscillator, said oscillator being an Inductive-Capacitive (LC) oscillator and including an inductor of known value and a capacitor under test; comparing an output of said oscillator to a reference output; and evaluating variation for said capacitor based on said comparing.

28. The method of claim 27 wherein comparing said output comprises: capturing cycles of said oscillator in a counter; and outputting the contents of said counter to a computational circuit; and comparing said counter contents to a reference value by said computational circuit.

29. The method of claim 27 wherein operating said oscillator comprises: enabling said oscillator; allowing said oscillator to reach steady state; and capturing said output of said oscillator after steady state is reached.

30. The method of claim 27 wherein said capturing cycles of said oscillator in said counter comprises: dividing said output of said oscillator; zeroing portions of said divided output that do not occur in a designated time period.

31. The method of claim 27 wherein said capacitor under test is formed on a same semiconductor chip as a plurality of capacitors, said method further comprising: adjusting an operation of a circuit component in response to said evaluated variation.

32. The method of claim 31 further comprising: receiving information associated with said calculated variation by an executing software program; based upon said information, controlling by said software program the behavior of a filter component, said filter component including one or more of said plurality of capacitors.

Description:

SYSTEMS AND METHODS FOR DETECTING CAPACITOR PROCESS

VARIATION

CROSS-REFERENCE TO RELATED APPLICATIONS

[0001] This application is related to United States Patent Application serial no. 11/513,550, filed August 31, 2006 entitled "SYSTEMS AND METHODS FOR FILTER CENTER FREQUENCY LOCATION," and to United States Patent Application serial no. 11/513,520, filed August 31, 2006 entitled "RF FILTER ADJUSTMENT BASED ON LC VARIATION," the disclosures of which are hereby incorporated herein by reference.

SYSTEMS AND METHODS FOR DETECTING CAPACITOR PROCESS

VARIATION

TECHNICAL FIELD

[0002] Various embodiments of the present invention relate to measuring variation of one or more capacitors in semiconductor components.

BACKGROUND OF THE INVENTION

[0003] Currently, it is common to form various systems on semiconductor chips. General purpose processors, digital signal processors, Application Specific Integrated Circuits (ASICs), and the like are manufactured by forming a variety of transistors, resistors, capacitors, inductors, etc., on a semiconductor substrate.

[0004] The processes that are used to form the circuit elements on a semiconductor substrate are sometimes less than ideal and cause some amount of process variation in the circuit elements. Process variation, in general, is the difference between an actual quality of a circuit element and its nominal quality. For instance, capacitors formed in semiconductor chips tend to have process variation of up to approximately plus or minus 20%, depending on the process. Thus, the actual capacitance of a given capacitor on a chip, measured in Farads, may be significantly different from the intended or nominal value specified in the design.

[0005] One application that uses capacitors is a tuner circuit. Specifically, such tuner circuits may include input filtering functions to condition input signals before they are passed to other tuner components. Most such filters are Inductive-Capacitive (LC) circuits. The frequency response of a given LC filter depends on the values of the capacitor(s) and inductor(s) in the circuit. Thus, capacitor variation can cause frequency response shifts in filters, causing non-ideal operation.

[0006] Prior art solutions have compensated for capacitor variation by measuring time-constant change in one or more Resistive-Capacitive (RC) circuits. However, since the time constant in an RC circuit is equal to resistance times capacitance, and since resisters also usually include a non-negligible amount of variation, time constant deviation fails to allow for the isolation of capacitor process variation. Thus, capacitor variation can only be approximated or guessed from the time constant deviation. The prior art offers no system that can accurately measure capacitor variation for a group of capacitors in an application.

BRIEF SUMMARY OF THE INVENTION

[0007] Various embodiments of the present invention are directed to systems and methods which evaluate capacitor variation for one capacitor or a plurality of capacitors in a device. Such embodiments assess capacitor process variation in the device accurately because the measurement of the variation isolates capacitor variation from other factors, such as resistor process variation.

[0008] hi one example system, a capacitor under test is part of an LC oscillator. The LC oscillator includes at least one inductor of known value. Generally, inductors disposed on chips have minimal process variation (i.e., within 1% of nominal value); thus, the value of a given inductor is often assumed to be its nominal value. The LC oscillator is operated, and its output is captured. The output is compared to a value that represents the output of the oscillator under ideal performance. If process variation has caused the capacitor under test to have a smaller than nominal capacitance, then the LC oscillator will oscillate at higher frequency than it would had the capacitor been at nominal value. On the other hand, larger than nominal capacitance will cause the LC oscillator to exhibit lower frequency performance. The captured output, in one example, is a count of cycles of the LC oscillator, and the count is compared to a number of ideal cycles. The difference represents a percentage change in frequency.

[0009] The percentage change in frequency can then be used to evaluate the capacitor variation. When the capacitor under test and other capacitors are formed on a same device during the same processes, it may generally be assumed that capacitor variation is the same or approximately the same for all such capacitors. Thus, the evaluated variation may be associated with variation of the other capacitors in the device. Evaluation of the variation may be performed, for example, by circuit-based logic or machine executable code.

[0010] One example use for evaluated capacitor variation is in the tuning of filters. Many filters for conditioning signals employ capacitors in LC, and/or RC circuits. Thus, capacitor variation causes some shift in frequency response for each such filter. A tuning component based on circuit logic and/or machine executable code can

use the evaluated capacitor variation to compensate for the change in frequency response.

[0011] In one embodiment, a filter component includes a plurality of individual filter elements, each with a passband that is centered at a different frequency. Each individual filter element is associated with a frequency range. As an application selects different frequency components of an input signal, a tuning component selects one of the filter elements based on the range that the desired signal component falls in. The frequency values at which filters are switched may be referred to as "breakpoints." In this example system, a tuning component uses the evaluated capacitor variation to adjust the breakpoints to compensate for capacitor variation in each of the individual filter elements.

[0012] In another embodiment, selecting one or more individual filter elements is performed during manufacturing or testing. For instance, once the capacitor variation is ascertained, one or more connections may be made or broken (e.g., as in a programmable logic device) in a permanent or semi-permanent way, thereby setting the operating parameters of the filter.

[0013] Rather than (or in addition to) tuning a filter based upon evaluated capacitor variation, it is also possible in some embodiments to adjust one or more other circuit components. For instance, in an example RF tuner circuit, a filter is preceded in the RF signal path by a first mixer and followed in the RF signal path by a second mixer. Either or both of the mixers may be adjusted to adapt to the offset center frequency of the filter.

[0014] The foregoing has outlined rather broadly the features and technical advantages of the present invention in order that the detailed description of the invention that follows may be better understood. Additional features and advantages of the invention will be described hereinafter which form the subject of the claims of the invention. It should be appreciated by those skilled in the art that the conception and specific embodiment disclosed may be readily utilized as a basis for modifying or designing other structures for carrying out the same purposes of the present invention. It should also be realized by those skilled in the art that such equivalent constructions do

not depart from the spirit and scope of the invention as set forth in the appended claims. The novel features which are believed to be characteristic of the invention, both as to its organization and method of operation, together with further objects and advantages will be better understood from the following description when considered in connection with the accompanying figures. It is to be expressly understood, however, that each of the figures is provided for the purpose of illustration and description only and is not intended as a definition of the limits of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS

[0015] For a more complete understanding of the present invention, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

[0016] FIGURE 1 is an illustration of an exemplary system adapted according to one embodiment of the invention;

[0017] FIGURE 2 A is an illustration of an exemplary system adapted according to one embodiment of the invention;

[0018] FIGURE 2B shows a capacitor under test in a parallel LC configuration, and FIGURE 2C shows a capacitor under test in a series LC configuration;

[0019] FIGURE 3 A is an illustration of an exemplary system adapted according to one embodiment of the invention;

[0020] FIGURE 3B is an illustration of an exemplary filter component adapted according to one embodiment;

[0021] FIGURE 4 is an illustration of an exemplary system adapted according to one embodiment of the invention; and

[0022] FIGURE 5 is an illustration of an exemplary method adapted according to one embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

[0023] FIGURE 1 is an illustration of system 100 adapted according to one embodiment of the invention. System 100 is a system for measuring the capacitor variation in a semiconductor device, wherein variation is the difference between an intended or nominal value and the actual value of a capacitor. System 100 includes LC oscillator 101, circuit 102 for capturing the output of LC oscillator 101, and computational unit 103 for comparing the captured output to a reference output and to evaluate the variation based thereon. System 100 is formed on a semiconductor chip with other circuits that include capacitors. The capacitor variation evaluated by system 100 is a measure of capacitor variation for all or nearly all capacitors in the chip. Systems according to the principles of system 100 can be designed in a variety of configurations, and one such configuration is shown in FIGURE 2A.

[0024] FIGURE 2A is an illustration of exemplary system 200 adapted according to one embodiment of the invention. System 200 is operable to measure variation in a capacitor under test in LC oscillator 220. LC oscillator 220 can take a variety of forms and is shown in two basic configurations in FIGURES 2B and 2C. FIGURE 2B shows capacitor under test 225 in a parallel LC configuration, and FIGURE 2C shows capacitor under test 225 in a series LC configuration. LC oscillator 220 is not limited to any specific design, as long as it outputs a periodic signal, such as a sinusoid, square wave, or the like. Capacitor under test 225 is paired with inductor 226, which is of a known value, and negative resistance 227 (e.g., an active element providing positive feedback) to form an oscillator circuit. In many applications, inductors (especially those made on-chip) tend to have little variation, such that it is possible to know the value of the given inductor to a high degree of accuracy.

[0025] hi operation of system 200 according to one embodiment, the first step is providing a start pulse to control logic 210. Control logic 210 then enables LC oscillator 220. At the same time, control logic 210 also sends a high signal to AND gate 265, thereby enabling input of the 16 MHz (f ref ) reference signal to divider 260. The output of divider 260 is the input for divider 270, the output of which is fed to AND gate 240.

[0026] System 200 is designed to allow LC oscillator 220 to come to steady state before any measurements are made, and such feature is provided by dividers 260 and 270 and AND gate 240. The output of divider 270 is a square wave that starts low (i.e., binary zero), such that the first f ref /16 cycles cause a zero to be input into AND gate 240. The zero causes AND gate 240 to output a zero, thereby zeroing any pulses received from divider 230. The second f ref /16 cycles cause a high value (i.e., binary one) to be input to AND gate 240. The one causes AND gate 240 to output the pulses that it receives from divider 230. Thus, the first f ref /16 cycles is used to allow LC oscillator 220 to reach steady state before its output is captured. The second f ref /16 cycles are the measurement period, wherein counter 250 captures the divided output of LC oscillator 220. hi this design, the measurement period lasts 1 μsec. Control logic 210 disables LC oscillator after the end of the second f ref /16 cycles.

[0027] Returning to the operation of LC oscillator 220, the output thereof is fed to divider 230 and to AND gate 240. LC oscillator 220 is designed such that if there is zero variation in capacitor under test 225, then LC oscillator 220 will output a 1.024 GHz pulse. If capacitor under test 225 has a larger than nominal capacitance, then the frequency of LC oscillator 220 will be lower than 1.024 GHz. On the other hand, if the capacitance of capacitor under test 225 is smaller than its nominal value, then the frequency will be higher. The capacitor change is an inverse squared function of the frequency change.

[0028] System 200 captures the output of LC oscillator 220 by counting the pulses of its divided output, hi this specific example, LC oscillator 220 ideally causes counter 250 to store a value of one hundred twenty-eight during the 1 μsec measurement period. Thus, capacitor variation is measured by comparing the value stored in counter 250 to the ideal one hundred twenty-eight reference output. Each least significant bit difference in the stored value represents a 0.78125% change in frequency of LC oscillator 220 from its ideal frequency of 1.024 GHz.

[0029] The contents of counter 250 is sent to computational unit 280, which compares the stored value to one hundred twenty-eight, and from that comparison, evaluates the capacitor variation. Different techniques to evaluate capacitor variation from difference in the stored output are possible. In one example, the difference in the

stored output is used to calculate the frequency of LC oscillator 220. Computational unit 280 then uses the frequency to find the capacitor variation in a look-up table, hi another example, computational unit 280 inputs the oscillator frequency into a mathematical algorithm that calculates the capacitor variation from the frequency, the inductor value, and the nominal value of capacitor under test 225. Other embodiments evaluate the capacitor variation without actually calculating it. For example, one embodiment categorizes variation according to its degree in a finite number of classes. The invention is not limited to any particular technique to evaluate capacitor variation.

[0030] The embodiment of system 200 is meant to be an example only, and other embodiments may deviate from the configuration of system 200. For instance, the specific frequencies of LC oscillator 220 and the reference signal are not required by other embodiments, and the use of different values are within the scope of the invention. Just as the various frequencies are not required in some embodiments, the number and values of dividers in a given circuit are also not required in some embodiments. For instance, in an alternate embodiment, LC oscillator 220 may be designed to have an ideal operating frequency of 0.128 GHz, while divider 230 is eliminated from the system. However, the values of the frequencies of LC oscillator 220 and the reference signal may be influenced, in part, by one or more constraints, such as the size of inductor 226 needed to produce a given nominal frequency value, and the availability of a reference signal, such as a clock, in a larger system into which system 200 is adapted. Another constraint is the speed at which counter 250 can accurately operate, especially when implemented in Complementary Metal Oxide Semiconductor (CMOS) logic.

[0031] Further, some embodiments may not use the digital counter configuration shown in system 200 to determine variation, hi an alternate embodiment, a system uses a phase frequency detector in a phase lock loop, hi fact, any configuration that changes frequency to measurable quantity can be used in some embodiments.

[0032] Embodiments may include a variety of configurations. In one example configuration, LC oscillator 220 is part of a system under test, and the other parts of system 200 are included as equipment in a separate testing system adapted to test any LC oscillator. Thus, after the testing system tests LC oscillator 220, a user may

reconnect the equipment to test another LC oscillator, by, for example, connecting to inputs on another chip with another LC oscillator.

[0033] Alternatively, system 200 may be part of a larger system, such as an on-chip tuner or other kind of application. FIGURE 3 A is an illustration of exemplary system 300 adapted according to one embodiment of the invention. FIGURE 3B is an illustration of exemplary filter component 302 adapted according to one embodiment. System 300 is built on semiconductor chip 304 and includes system 200 (FIGURE 2A), tuning unit 301, and filter component 302. As explained above with regard to system 200, capacitor variation is detected and evaluated. Information associated with the capacitor variation is passed to tuning component 301, which tunes filter 302 based, at least in part, on the capacitor variation. Tuning unit 301 may be, for example, hardwired logic built on chip 304 or may be a functional unit that is based on machine- executable code.

[0034] In this example, system 300 employs filter component 302 to condition a signal, such as a Radio Frequency (RF) signal. Filter 302 includes three filter elements 310, 320, 330. Each filter element 310, 320, 330 has a different frequency response, and the frequency response of filter 302 is a function of the selection of one or more of filter elements 310, 320, 330. Filter elements 310, 320, 330 include capacitors that are similar to capacitor under test 225 (FIGURES 2B and 2C). In fact, because they are formed on the same chip, capacitor 225 and the capacitors of filter elements 310, 320, 330 are created in the same processes, and, therefore, will exhibit minimal relative variation (i.e., process variations within 1-2% of each other). Because of the capacitor variation, filter elements 310, 320, 330 will each differ somewhat from their nominal frequency responses. Tuning unit 301 accounts for the capacitor process variation by selecting filters with appropriate actual responses.

[0035] In one example, tuning unit 301 receives the information associated with capacitor variation, inputs the information into an algorithm, calculates the frequency responses of filter elements 310, 320, 330 therefrom, and selects one or more of filter elements 310, 320, 330 for a desired frequency response. In this example, a filter may be selected by closing its respective switch 315, 325, 335. Thus, if the capacitor variation causes each of filters 310, 320, 330 to shift its passband down by

10%, then tuning unit 301 may select a filter element based on its actual passband. In an alternate embodiment, tuning unit 301 may access a look-up table indexed by passband variations that specifies filter combinations. Any method to select one or more filter elements based on evaluated capacitor variation is within the scope of various embodiments.

[0036] In some embodiments, selecting one or more filter elements may be performed during a manufacturing process, such that the making and breaking of connections to the filter elements is permanent or semi-permanent. In other embodiments, it is performed during operation of the chip, for example, at power-up or during selection of frequency components of an input RF signal. For real-time tuning, switches 315, 325, and 335 maybe made from transistors that can be turned on and off.

[0037] In one example real-time tuning application, each filter element 310, 320, 330 has a different passband, and elements 310, 320, 330 are arranged in increasing or decreasing order of center passband frequency. Thus, each filter element is associated with a frequency component of an input signal. As a tuner selects one or more frequency components of the input signal, system 300 switches from one filter element to another. Points at which filters are switched may be referred to as "breakpoints." In such a system tuning unit 301 tunes filter 302 by adjusting the breakpoints to compensate for frequency response shift due to capacitor variation.

[0038] In the example above, filter tuning is described as making/breaking connections to select discrete filter elements. However, various embodiments are not limited to any particular technique for tuning a filter. For instance, in one embodiment, circuitry before or after a given filter circuit may be adjusted to account for the effects of process variation in the capacitors. In another embodiment, other elements inside a filter circuit may be adjusted to tune the frequency response of a filter, based at least in part on capacitor process variation.

[0039] While the example in FIGURES 3A and 3B describes adjusting the behavior of a filter, various embodiments are not limited to adjusting filters. In fact, the principles described above may be used to adjust a variety of other circuit components that include capacitors. Examples of such components include oscillators.

[0040] FIGURE 4 is an illustration of example system 400 adapted according to one embodiment of the invention. System 400 is an example RF tuner circuit, wherein filter 302 is preceded in the signal path by first mixer 403 and followed in the signal path by second mixer 404. The behavior of mixer 403 is controlled by local oscillator 401, and the behavior of mixer 404 is controlled by local oscillator 402. Either or both of oscillators 401 and 402 may be adjusted to change a center frequency of the signal to adapt to the offset center frequency of filter 302.

[0041] FIGURE 5 is an illustration of exemplary method 500 adapted according to one embodiment of the invention. Method 500 may be performed, for example, by one or more devices on a semiconductor chip, and may even be performed entirely on a single semiconductor chip, hi step 501, an oscillator is operated, the oscillator being an LC oscillator and including an inductor of known value and a capacitor under test. Step 501 may include, for example, enabling the LC oscillator and/or other parts of a testing circuit.

[0042] In step 502, an output of the oscillator is compared to a reference output, hi one example, the output is captured by a counter than counts pulses from the oscillator during a defined time period. Then, the number of pulses counted is compared to a reference number that represents an ideal output. Various factors may influence the choice of the time period for capturing the output. For example, a longer time period may allow for more accuracy, while a shorter time period may allow for use of a smaller counter. Step 502 may also include allowing the LC oscillator to reach steady state before beginning capturing the output.

[0043] hi step 503, a variation of the capacitor under test is evaluated based on the comparing. In the embodiment described above wherein cycles of the LC oscillator are compared to a reference number, the variation can be evaluated, for example, by determining the actual frequency of the LC oscillator and using the actual frequency to calculate the actual value of the capacitor under test. The variation is the difference between the actual and nominal values of the capacitance of the capacitor under test. Evaluating capacitor variation can be performed a variety of ways in various embodiments, hi some embodiments, variation is calculated in Farads, hi other embodiments, variation is calculated in percentage of nominal value. In still other

embodiments, variation is approximated and classified in one or more categories of degree. Any technique for evaluating capacitor variation is within the scope of the invention.

[0044] In step 504, information associated with the evaluated variation is passed to a tuning element adapted to change the frequency response of a filter. The information may be an actual calculated value measured in Farads, a percentage value representing the variation, the actual capacitance value, or the like. The tuning element may be hardware-based or may be made of machine executable code and is operable to receive the information and adjust the frequency response of the filter accordingly. In this example, the filter includes one or more capacitors with the same or similar process variation as the capacitor under test so that the variation information is relevant to the operation of the filter.

[0045] In step 505, a frequency response of the filter is adjusted based at least in part on the variation. Different ways of adjusting the frequency response of the filter are possible. In one example, the filter includes a plurality of selectable filter elements, and the tuning element includes logic that selects one or more the filter elements in response to the variation. In another example embodiment, the filter may have other adjustable components that are manipulated to change the frequency response of the filter.

[0046] In one example, method 500 is performed as a system operates, such that the tuning component may perform step 505 continually, at specified times, in response to certain stimuli, or the like. In another example, method 500 is performed during manufacturing of a system, and the frequency response of the filter is set somewhat permanently.

[0047] An advantage of some embodiments is that process variation can be narrowed, effectively, to only that attributable to capacitors. Some prior art systems detect deviations in a time constant, and in RC circuits, the time constant depends on the capacitor and resistor. Because resistors formed on semiconductor chips often have significant variation, it is difficult to discern which portion of the deviation in time constant is due to resistor variation and which is due to process variation. Various

embodiments of the present invention pair a capacitor with an inductor of known value. Thus, the deviation from ideal can be assumed to be wholly attributable to the capacitor. Further, once capacitor variation for a chip is known, values for those capacitors that are in RC circuits can be known.

[0048] hi some embodiments components to calculate capacitor variation can be formed on a single semiconductor chip along with other applications. For instance, such components can be added to a tuner on a chip, and the resulting system can be contained on that chip. The result is a chip-specific capacitor variation solution. Providing an accurate and dependable technique for measuring capacitor variation may facilitate the use of single-chip systems, thereby allowing for increases in miniaturization.

[0049] hi some embodiments the components to calculate capacitor variation may be added to a chip design separate from the other logic. Variation of all or nearly all capacitors in the chip can be calculated accurately since the capacitor under test is formed in the same processes as the other capacitors that are in filters and other on-chip components. Accordingly, evaluating and compensating for capacitor variation can be performed continually or periodically. For example, evaluating and compensating for capacitor variation can take place during power on of a chip, when input frequency is changed, at regular intervals, or the like. Further, as chips age and components "drift," the drift can be evaluated and compensated for.

[0050] Yet another advantage of some embodiments is that the reference frequency may be taken from a clock that is used for another purpose. Therefore, some embodiments do not require additional clock circuitry.

[0051] Although the present invention and its advantages have been described in detail, it should be understood that various changes, substitutions and alterations can be made herein without departing from the spirit and scope of the invention as defined by the appended claims. Moreover, the scope of the present application is not intended to be limited to the particular embodiments of the process, machine, manufacture, composition of matter, means, methods and steps described in the specification. As one of ordinary skill in the art will readily appreciate from the

disclosure of the present invention, processes, machines, manufacture, compositions of matter, means, methods, or steps, presently existing or later to be developed that perform substantially the same function or achieve substantially the same result as the corresponding embodiments described herein may be utilized according to the present invention. Accordingly, the appended claims are intended to include within their scope such processes, machines, manufacture, compositions of matter, means, methods, or steps.