SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS

Title:

SYSTEMS AND METHODS FOR FABRICATION OF SUPERCONDUCTING INTEGRATED CIRCUITS

Document Type and Number:

WIPO Patent Application WO/2010/099312

Kind Code:

A3

Abstract:

Various techniques and apparatus permit fabrication of superconductive circuits and structures, for instance Josephson junctions, which may, for example be useful in quantum computers. For instance, a low magnetic flux noise trilayer structure may be fabricated having a dielectric structure or layer interposed between two elements or layers capable of superconducting. A superconducting via may directly overlie a Josephson junction. A structure, for instance a Josephson junction, may be carried on a planarized dielectric layer. A fin may be employed to remove heat from the structure. A via capable of superconducting may have a width that is less than about 1 micrometer. The structure may be coupled to a resistor, for example by vias and/or a strap connector.

Inventors:

LADIZINSKY ERIC (US)
ROSE GEORDIE (CA)
HILTON JEREMY P (CA)
DANTSKER EUGENE (US)
OH BYONG HYOP (US)

Application Number:

PCT/US2010/025403

Publication Date:

December 29, 2010

Filing Date:

February 25, 2010

Export Citation:

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Assignee:

DWAVE SYS INC (CA)
LADIZINSKY ERIC (US)
ROSE GEORDIE (CA)
HILTON JEREMY P (CA)
DANTSKER EUGENE (US)
OH BYONG HYOP (US)

International Classes:

H01L39/24; H01L39/22

Foreign References:

US5869846A	1999-02-09
JPH104223A	1998-01-06
KR20010067425A	2001-07-12
JPS6215869A	1987-01-24

Other References: