Title:
SYSTEMS AND METHODS PROVIDING A MATCHING CIRCUIT THAT BYPASSES A PARASITIC IMPEDANCE
Document Type and Number:
WIPO Patent Application WO/2018/031347
Kind Code:
A8
Abstract:
A circuit including a radio frequency (RF) amplifier including a transistor configured to receive an RF signal at its control terminal, a capacitor coupled to a first terminal of the transistor, an inductor coupled to a second terminal of the transistor, wherein the capacitor and inductor form a loop from the first terminal to the second terminal, wherein the loop bypasses a parasitic inductance between the second terminal and ground.
Inventors:
XI TIANZUO (US)
KANG HAICHUAN (US)
CHEN ZHENQI (US)
LUO ZHENYING (US)
ZHANG XIANGDONG (US)
WANG XINWEI (US)
SUN YANJIE (US)
HAU YAN KIT GARY (US)
CHEN JING-HWA (US)
KANG HAICHUAN (US)
CHEN ZHENQI (US)
LUO ZHENYING (US)
ZHANG XIANGDONG (US)
WANG XINWEI (US)
SUN YANJIE (US)
HAU YAN KIT GARY (US)
CHEN JING-HWA (US)
Application Number:
PCT/US2017/045196
Publication Date:
March 07, 2019
Filing Date:
August 02, 2017
Export Citation:
Assignee:
QUALCOMM INC (US)
International Classes:
H03F1/56; H03F3/193; H03F3/195
Attorney, Agent or Firm:
KELTON, Thomas W. et al. (US)
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