RELATED APPLICATION

The present disclosure claims priority to United States Non-Provisional Patent Application Serial No. 14/483,659, filed September 11, 2014, which is incorporated by reference herein in its entirety.

FIELD OF DISCLOSURE

The present disclosure relates in general to circuits for audio devices, including without limitation personal audio devices such as wireless telephones and media players, and more specifically, to systems and methods for enhancing a dynamic range of an audio signal path in an audio device while reducing the existence of audio artifacts when switching between dynamic range enhancement modes. BACKGROUND

Personal audio devices, including wireless telephones, such as mobile/cellular telephones, cordless telephones, mp3 players, and other consumer audio devices, are in widespread use. Such personal audio devices may include circuitry for driving a pair of headphones or one or more speakers. Such circuitry often includes a power amplifier for driving an audio output signal to headphones or speakers.

One particular characteristic of a personal audio device which may affect its marketability and desirability is the dynamic range of its audio output signal. Stated simply, the dynamic range is the ratio between the largest and smallest values of the audio output signal. One way to increase dynamic range is to apply a high gain to the power amplifier. However, noise present in an audio output signal may be a generally monotonically increasing function of the gain of amplifier Al, such that any increased dynamic range as a result of a high-gain amplifier may be offset by signal noise which may effectively mask lower-intensity audio signals.

U.S. Patent Application Serial No. 14/083,972, filed November 19, 2013, entitled "Enhancement of Dynamic Range of Audio Signal Path," and assigned to the applicant

(Cirrus Logic, Inc.) of the present disclosure (the "'972 Application") discloses methods and systems for enhancing the dynamic range of an audio signal path. In the '972 Application, an apparatus for providing an output signal to an audio transducer includes an analog signal path portion, a digital-to-analog converter (DAC), and a control circuit. The analog signal path portion has an audio input for receiving an analog signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog signal and in conformity with the selectable analog gain. The DAC has a selectable digital gain and may be configured to convert a digital audio input signal into the analog signal in conformity with the selectable digital gain. The control circuit may be configured to select the selectable analog gain and select the selectable digital gain in accordance with one or more gain modes based on a magnitude of a signal indicative of the output signal, and may select the selectable analog gain and select the selectable digital gain so as to maintain a constant gain through the overall signal path regardless of the applicable gain mode.

In the dynamic range enhancement architecture of the '972 Application and similar architectures, the DAC may a have a latency or group delay and/or may also apply a transient response to the selectable digital gain, such that the selectable digital gain is effectively applied to an analog input signal as a transient switching between the two levels of the selectable digital gain. Without correction of such latency and transient, a glitch may be present in the output signal, which may cause audio artifacts perceptible to a listener.

SUMMARY

In accordance with the teachings of the present disclosure, one or more disadvantages and problems associated with existing approaches to maintaining a high dynamic range of an audio signal path may be reduced or eliminated.

In accordance with embodiments of the present disclosure, an apparatus for providing an output signal to an audio transducer may include a signal path and a control circuit. The signal path may include an analog signal path portion and a digital signal path portion. The analog signal path portion may have an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain. The digital signal path portion may have a selectable digital gain and may be configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digital gain. The control circuit may be configured to, responsive to an indication to switch between gain modes of the signal path, switch the selectable analog gain between a first analog gain and a second analog gain, switch the selectable digital gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain, and control an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path.

In accordance with these and other embodiments of the present disclosure, a method may be provided for use in a signal path comprising an analog signal path portion having an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain and further comprising a digital signal path portion having a selectable digital gain and configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digital gain. The method may include, responsive to an indication to switch between gain modes of the signal path, switching the selectable analog gain between a first analog gain and a second analog gain, switching the selectable digital gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain, and controlling an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path.

In accordance with these and other embodiments of the present disclosure, a personal audio device may include an audio transducer, a signal path, and a control circuit. The audio transducer may be configured to generate sound in accordance with an output signal received by the audio transducer. The signal path may be coupled to the audio transducer, and may include an analog signal path portion and a digital signal path portion. The analog signal path portion may have an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain. The digital signal path portion may have a selectable digital gain and may be configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digital gain. The control circuit may be configured to, responsive to an indication to switch between gain modes of the signal path, switch the selectable analog gain between a first analog gain and a second analog gain, switch the selectable digital gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain, and control an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path.

In accordance with these and other embodiments of the present disclosure, an apparatus for providing an output signal to an audio transducer may include a signal path and a control circuit. The signal path may include an analog signal path portion and a digital signal path portion. The analog signal path portion may have an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain. The digital signal path portion may have a selectable digitally-controlled gain and may be configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digitally-controlled gain, the digital signal path portion comprising a modulator. The modulator may include a forward path and a feedback path. The forward path may include a loop filter configured to generate a filtered signal responsive to the digital audio input signal and a feedback signal, a quantizer responsive to the filtered signal and configured to generate a quantized signal, and a first gain element configured to apply the selectable digitally-controlled gain to a signal within the forward path. The feedback path may be configured to generate the feedback signal responsive to the quantized signal, wherein the feedback path includes a second gain element having a gain inversely proportional to the selectable digitally-controlled gain. The control circuit may be configured to, responsive to an indication to switch between gain modes of the signal path, switch the selectable analog gain between a first analog gain and a second analog gain, and switch the selectable digitally-controlled gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain.

In accordance with these and other embodiments of the present disclosure, a method may be provided for use in a signal path comprising an analog signal path portion having an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain and further comprising a digital signal path portion having a selectable digitally- controlled gain and configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digitally-controlled gain. The method may include generating, by a loop filter of a modulator of the digital signal path portion, a filtered signal responsive to the digital audio input signal and a feedback signal. The method may also include generating, by a quantizer of the modulator, a quantized signal responsive to the filtered signal. The method may further include applying the selectable digitally-controlled gain to a forward path of the modulator comprising the loop filter and the quantizer. The method may additionally include generating, by a feedback path, the feedback signal responsive to the quantized signal, wherein generating the feedback signal comprising applying a gain inversely proportional to the selectable digitally- controlled gain to the quantized signal. The method may also include, responsive to an indication to switch between gain modes of the signal path, switching the selectable analog gain between a first analog gain and a second analog gain, and switching the selectable digitally-controlled gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain.

In accordance with these and other embodiments of the present disclosure, a personal audio device may include an audio transducer, a signal path, and a control circuit. The audio transducer may be configured to generate sound in accordance with an output signal received by the audio transducer. The signal path may be coupled to the audio transducer, and may include an analog signal path portion and a digital signal path portion. The analog signal path portion may have an audio input for receiving an analog input signal, an audio output for providing the output signal, and a selectable analog gain, and may be configured to generate the output signal based on the analog input signal and in conformity with the selectable analog gain. The digital signal path portion may have a selectable digitally-controlled gain and may be configured to convert a digital audio input signal into the analog input signal in conformity with the selectable digitally-controlled gain, the digital signal path portion comprising a modulator. The modulator may include a forward path and a feedback path. The forward path may include a loop filter configured to generate a filtered signal responsive to the digital audio input signal and a feedback signal, a quantizer responsive to the filtered signal and configured to generate a quantized signal, and a first gain element configured to apply the selectable digitally- controlled gain to a signal within the forward path. The feedback path may be configured to generate the feedback signal responsive to the quantized signal, wherein the feedback path includes a second gain element having a gain inversely proportional to the selectable digitally-controlled gain. The control circuit may be configured to, responsive to an indication to switch between gain modes of the signal path, switch the selectable analog gain between a first analog gain and a second analog gain, and switch the selectable digitally-controlled gain between a first digital gain and a second digital gain, wherein the product of the first analog gain and the first digital gain is approximately equal to the product of the second analog gain and the second digital gain.

Technical advantages of the present disclosure may be readily apparent to one skilled in the art from the figures, description and claims included herein. The objects and advantages of the embodiments will be realized and achieved at least by the elements, features, and combinations particularly pointed out in the claims.

It is to be understood that both the foregoing general description and the following detailed description are examples and explanatory and are not restrictive of the claims set forth in this disclosure.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein: FIGURE 1 is an illustration of an example personal audio device, in accordance with embodiments of the present disclosure;

FIGURE 2 is a block diagram of selected components of an example audio integrated circuit of a personal audio device, in accordance with embodiments of the present disclosure;

FIGURE 3 is a block diagram of selected components of a gain control circuit for use within the audio integrated circuit depicted in FIGURE 2, and selected components of an audio integrated circuit which may be coupled to the gain control circuit, in accordance with embodiments of the present disclosure;

FIGURES 4A-4C are example graphs illustrating various glitch correction approaches, in accordance with embodiments of the present disclosure;

FIGURE 5 illustrates a block diagram of an example implementation of a digital- to-analog converter, in accordance with embodiments of the present disclosure;

FIGURE 6 is a block diagram of selected components of a gain control circuit for use within the audio integrated circuit depicted in FIGURE 2, and selected components of an audio integrated circuit which may be coupled to the gain control circuit, in accordance with embodiments of the present disclosure; and

FIGURE 7 is a block diagram of a modulator for use within a digital-to-analog converter depicted in FIGURE 6, in accordance with embodiments of the present disclosure.

DETAILED DESCRIPTION

In accordance with embodiments of the present disclosure, an integrated circuit for use in an audio device, such as a personal audio device (e.g., mobile telephone, portable music player, tablet computer, personal digital assistant, etc.), may include a signal path having a digital signal path portion (e.g., an audio compressor) and an analog path portion (e.g., an audio expander). The digital signal path portion may be configured to receive a digital input signal (e.g., a digital audio signal), apply a selectable digital gain x to the digital input signal, and convert the digital input signal (e.g., via a digital-to- analog converter) to an analog signal in conformity with the selectable digital gain. The analog path portion may be configured to receive the analog signal and apply (e.g., by an analog amplifier) a selectable analog gain k/x to the analog signal to generate an output signal, wherein said output signal may be communicated to a loudspeaker for playback and/or to other circuitry for processing. The numerator k of the selectable analog gain may be a constant defining an overall cumulative gain of the signal path. A control circuit coupled to the signal path may be capable of modifying the selectable digital gain and the selectable analog gain, for example to maximize a dynamic range of the signal path. For example, based on analysis of the output signal or another signal within the signal path indicative of the output signal, the control circuit may select a value for the selectable digital gain and a corresponding value for the selectable analog gain. Thus, for lower magnitudes of the output signal, the control circuit may select a higher selectable digital gain and a lower selectable analog gain, and for higher magnitudes of the output signal, the control circuit may select a lower selectable digital gain and a higher selectable analog gain. Such selectable gains may allow a signal path to increase its dynamic range to lower-magnitude signals, while preventing undesirable effects such as signal clipping for higher-magnitude signals. In operation, the control circuit may also be configured to predict, based on a magnitude of a signal indicative of the output signal, a condition for changing the selectable digital gain and the selectable analog gain, and responsive to predicting the occurrence of the condition, change, at an approximate time in which a zero crossing of the signal indicative of the output signal occurs, the selectable digital gain and the selectable analog gain.

The integrated circuit described above may be used in any suitable system, device, or apparatus, including without limitation, a personal audio device. FIGURE 1 is an illustration of an example personal audio device 1, in accordance with embodiments of the present disclosure. FIGURE 1 depicts personal audio device 1 coupled to a headset 3 in the form of a pair of earbud speakers 8 A and 8B. Headset 3 depicted in FIGURE 1 is merely an example, and it is understood that personal audio device 1 may be used in connection with a variety of audio transducers, including without limitation, headphones, earbuds, in-ear earphones, and external speakers. A plug 4 may provide for connection of headset 3 to an electrical terminal of personal audio device 1. Personal audio device 1 may provide a display to a user and receive user input using a touch screen 2, or alternatively, a standard liquid crystal display (LCD) may be combined with various buttons, sliders, and/or dials disposed on the face and/or sides of personal audio device 1. As also shown in FIGURE 1, personal audio device 1 may include an audio integrated circuit (IC) 9 for generating an analog audio signal for transmission to headset 3 and/or another audio transducer.

FIGURE 2 is a block diagram of selected components of an example audio IC 9 of a personal audio device, in accordance with embodiments of the present disclosure. As shown in FIGURE 2, a microcontroller core 18 may supply a digital audio input signal DIG_IN to a gain element 12 to apply a selectable digital gain x selected by gain control circuit 20 to the digital input signal DIG_IN. The amplified digital audio input signal may be communicated to a digital-to-analog converter (DAC) 14, which may convert the digital audio input signal to an analog signal V _I - Together, gain element 12 and DAC block 14 may be referred to herein as a digital signal path portion of the signal path from the input node for digital audio input signal DIG_IN to the output node for output voltage signal V _OUT depicted in FIGURE 2. In the relevant art, gain element 12 and DAC block 14 may sometimes be referred to as an audio compressor.

DAC block 14 may supply analog signal V _IN to an amplifier stage 16 which may amplify or attenuate audio input signal V _IN in conformity with a selectable analog gain k/x to provide an audio output signal V _OUT , which may operate a speaker, headphone transducer, a line level signal output, and/or other suitable output. Amplifier stage 16 may be referred to herein as an analog path portion of the signal path from the input node for digital audio input signal DIG_IN to the output node for output voltage signal V _OUT depicted in FIGURE 2. In the relevant art, amplifier stage 16 may sometimes be referred to as an audio expander. A capacitor CO may be utilized to couple the output signal to the transducer or line level output, particularly if amplifier stage 16 is operated from a unipolar power supply having a quiescent voltage substantially differing from ground. A power supply 10 may provide the power supply rail inputs of amplifier stage 16.

As shown in FIGURE 2, audio IC 9 may include a gain control circuit 20 configured to, based on digital audio input signal DIG_IN, control selectable digital gain x of gain element 12 and a selectable analog gain k/x of amplifier stage 16. In embodiments in which a volume control is present, a volume control signal may be provided from a microcontroller or other digital control circuit responsive to a user interface, volume knob encoder or program command, or other suitable mechanism.

As an example of the dynamic range enhancement functionality of audio IC 9, when digital audio input signal DIG_IN is at or near zero decibels (0 dB) relative to the full-scale voltage of the digital audio input signal, gain control circuit 20 may select a first digital gain (e.g., x ) for the selectable digital gain and a first analog gain (e.g., k/xi) for the selectable analog gain. However, if the magnitude of digital audio input signal DIG_IN is below a particular predetermined threshold magnitude relative to the full-scale voltage of digital audio input signal DIG_IN (e.g., -20dB), gain control circuit 20 may select a second digital gain (e.g., ¾) greater than the first digital gain (e.g., x _∑ > xi) for the selectable digital gain and a second analog gain (e.g., k/xi) lesser than the second analog gain (e.g., k/x _∑ < klxi) for the selectable analog gain. In each case, the cumulative fixed path gain (e.g., k) of the selectable digital gain and the selectable analog gain may be substantially constant (e.g., the same within manufacturing and/or operating tolerances of audio IC 9). In some embodiments, k may be approximately equal to 1 , such that the cumulative path gain is a unity gain. Such modification of digital gain and analog gain may increase the dynamic range of audio IC 9 compared to approaches in which the digital gain and analog gain are static, as it may reduce the noise injected into audio output signal VOUT, which noise may be a generally monotonically increasing function of the analog gain of amplifier stage 16. While such noise may be negligible for higher magnitude audio signals (e.g., at or near OdB relative to full-scale voltage), the presence of such noise may become noticeable for lower magnitude audio signals (e.g., at or near - 20dB or lower relative to full-scale voltage). By applying a smaller analog gain at amplifier stage 16 for smaller signal magnitudes, the amount of noise injected into audio output signal VOUT may be reduced, while the signal level of audio output signal VOUT may be maintained in accordance with the digital audio input signal DIG_IN through application of a digital gain to gain element 12 inversely proportional to the analog gain.

FIGURE 3 is a block diagram of selected components of an example gain control circuit 20 for use within audio IC 9, and selected components of audio IC 9 which may be coupled to gain control circuit 20, in accordance with embodiments of the present disclosure.

As shown in FIGURE 3, amplifier stage 16 may comprise an operational amplifier 22 and a plurality of resistors 28 (e.g., 28A-28D) such that the selectable analog gain is set by the resistances R R ₂ , R ₃ , and R ₄ of resistors 28A, 28B, 28C, and 28D, respectively. For example, in the embodiments represented by FIGURE 3, resistor 28B may have a variable resistance R ₂ . In such embodiments, resistor 28B may comprise a switched resistor network comprising a resistor string having a plurality of taps each coupled to a corresponding switch. To apply a desired selectable analog gain to amplifier stage 16, such switches may be selectively opened and closed to create an effective resistance R ₂ between a negative input of operational amplifier 22 and the output of operational amplifier 22, wherein the selectable analog gain of operational amplifier 22 is based on such effective resistance R ₂ . Although FIGURE 3 depicts a particular architecture for providing analog gain of amplifier stage 16, other suitable architectures may be applied in accordance with this disclosure.

Also as shown in FIGURE 3, gain control circuit 20 may include a level detection circuit 42, a comparator block 46, a signal tracking block 47, a zero-cross detection circuit 48, a glitch correction circuit 44, a gain calibration circuit 52, an offset calibration circuit 54, and a gain control state machine 50. Level detection circuit 42 may include any suitable system, device, or apparatus for receiving digital audio input signal DIG_IN (or a derivative thereof), determining a magnitude of such signal, and outputting a signal indicative of such magnitude. Comparator block 46 may compare the output signal of level detection circuit 42 with N predetermined threshold magnitudes, wherein N is a positive integer, and based on such comparison, output a signal COMP_OUT (which may comprise N bits) indicative of whether the desired magnitude of audio output signal VOUT is greater or lesser than each of such predetermined threshold magnitudes. In some embodiments, such predetermined threshold magnitudes may be relative to a full-scale voltage of digital audio input signal DIG_IN and/or audio output signal VOUT- In some embodiments, comparator block 46 may implement hysteresis, such that signal COMP_OUT or a bit thereof may only transition if the output signal of level detection block 42 remains above or below a predetermined threshold magnitude for a minimum duration of time (e.g., 0.1 seconds to place any switching artifacts outside the human- perceptible audio range).

Zero-cross detection circuit 48 may include any suitable system, device, or apparatus for detecting the occurrence of a zero crossing of digital audio input signal DIG_IN (or a derivative thereof) and outputting a signal ZERO_DETECT indicating that a zero crossing of such signal has occurred. A zero crossing of a signal may occur when the waveform of such signal crosses a magnitude of zero or crosses another level within a threshold of zero and indicative of a zero crossing (e.g., a low signal level of lower than - 70 dB or within a small number of least significant bits of zero).

Signal tracking block 47 may comprise any suitable system, device, or apparatus for tracking a particular parameter of an audio signal, including without limitation a plurality of peaks of such audio signal and/or a signal envelope of such audio signal, and based thereon, generating an output signal TRACKING indicative of such tracked parameter.

Glitch correction circuit 44 may comprise any suitable system, device, or apparatus for correcting for a latency or group delay between the output of gain element 12 and the input of amplifier stage 16. Such glitch correction may account for a change of the selectable digital gain of gain element 12 which requires a latency to propagate to amplifier stage 16 where a corresponding selectable analog gain may be applied. Without such correction, the latency of group delay may cause audio artifacts to appear at the output of the signal path. Accordingly, as shown in FIGURE 3, glitch correction circuit 44 may receive analog input signal Vnsr and the digital audio input signal DIG_IN to determine a latency between such signals and/or a transient response of the signal path between digital audio input signal DIG_IN and analog input signal VIN, and based thereon, generate and communicate to gain control state machine 50 a signal GLITCH indicative of such latency and/or transient response. Based on signal GLITCH, gain control state machine 50 may control the application of selectable digital gain x of gain element 12 and a selectable analog gain k/x of amplifier stage 16 in order to reduce or eliminate glitches caused by such latency and/or transient response. In some embodiments, glitch control circuit 44 and/or gain control state machine 50 may reduce glitches by controlling an analog response of the signal path to reduce the occurrence of audio artifacts present in the output signal as a result of the switch between gain modes of the signal path, as is further described below in reference to FIGURES 4 A, 4B, 4C, and 5.

Gain calibration circuit 52 may comprise any suitable system, device, or apparatus for correcting for a non-ideal gain of amplifier stage 16. Due to non-idealities of amplifier stage 16 (e.g., temperature variations, process tolerances, etc.), an actual gain of amplifier stage 16 may differ from that of a desired level of gain determined by gain control state machine 50 and/or an ideal gain calculated based on nominal values of resistances Ri, R ₂ , R3, and R ₄ . Accordingly, gain calibration circuit 52 may determine the actual gain of amplifier stage 16 and output a signal GAIN_CAL indicative of such actual gain, and gain control state machine 50 may correct for non-idealities in selecting the selectable digital gain.

Offset calibration circuit 54 may comprise any suitable system, device, or apparatus for correcting for an offset of amplifier stage 16. To illustrate, operational amplifier 22 may include, due to non-idealities of amplifier stage 16 (e.g., temperature variations, process tolerances, etc.), a slight offset 26 from a desired ground or common mode voltage associated with amplifier stage 16, which may affect signal output V _OUT - Accordingly, offset calibration circuit 54 may determine the offset 26 of amplifier stage 16 and output a signal OFFSET_CAL, which may be communicated to an offset block 32 of DAC block 14 such that DAC block 14 may correct for such analog offset.

Gain control state machine 50 may receive signals COMP_OUT, TRACKING, ZERO_DETECT, GLITCH, and/or GAIN_CAL and based on one or more of such signals, generate the selectable digital gain and the selectable analog gain, as described in greater detail elsewhere in this disclosure. For example, when the magnitude of digital audio input signal DIG_IN transitions from above to below a predetermined threshold magnitude (e.g., -24 dB), signal COMP_OUT may indicate such transition and in response, gain control state machine 50 may wait until the occurrence of a zero crossing (as indicated by signal ZERO_DETECT), after which it may cause DAC block 14 to increase the selectable digital gain and decrease the selectable audio gain in a similar amount. By changing the selectable digital gain and the selectable audio gain at a zero crossing of digital audio input signal DIG_IN (or a derivative thereof), the change and any auditory artifacts associated with the change may be masked and therefore be unnoticeable or less noticeable to a listener of an audio device including audio IC 9.

As another example, when the sum of the magnitude of digital audio input signal

DIG_IN transitions from below to above a predetermined threshold magnitude (e.g., -24 dB), signal COMP_OUT may indicate such transition, and in response gain control state machine 50 may cause DAC block 14 to decrease the selectable digital gain and increase the selectable analog gain in a similar amount. However, when transitioning to lower digital gain mode, it may not be desirable to wait for a zero crossing of the output signal, as a transition from below to above the predetermined threshold magnitude may almost immediately lead to clipping of the audio signal. Accordingly, it may be desirable to predict whether the magnitude of digital audio input signal DIG_IN is likely to cross such predetermined threshold and switch the selectable digital gain and the selectable analog gain responsive to such prediction at a zero crossing event of the digital audio input signal DIG_IN occurring before crossing of the predetermined threshold by the digital audio input signal DIG_IN. By applying such predictive techniques, gain control block 20 may facilitate switching between gain modes to increase dynamic range while reducing audio artifacts.

FIGURES 4A-4C are example graphs illustrating example glitch correction approaches that may be employed by gain control circuit 20, in accordance with embodiments of the present disclosure. FIGURE 4A depicts an approach in which no glitch correction is performed by gain control circuit 20. In such approach, selectable digital gain x may change at a time t . Due to latencies in the signal path between digital audio input signal DIG_IN and analog input signal VIN, an effective digital gain x _eff applied to analog input signal VIN may be delayed from selectable digital gain x and/or may have a transient response which rises (or falls in cases when selectable digital gain x is changed from a higher to lower value) until a time t ₂ . Gain control circuit 20 may apply a corresponding change of selectable analog gain k/x at time t ₂ . As a result, the effective cumulative path gain x _eff · k/x may experience a sizable glitch 402A between times ti and t ₂ , meaning that the cumulative path gain does not have a fixed gain, as may be desired in the signal path.

As shown in FIGURE 4B, in some embodiments, gain control circuit 20 may reduce glitch by controlling the change of selectable analog gain k/x so that it occurs at a time t ₂ ' during the transient response of the effective digital gain x _eff at analog input signal VIN- Although the time t ₂ ' is shown in FIGURE 4B as occurring at the approximate middle of the transient response of the effective digital gain x _eff , gain control circuit 20 may cause selectable analog gain k/x to change during any portion of the transient response of the effective digital gain x _eff . As a result of controlling the change of selectable analog gain k/x so that it occurs at a time t ₂ ' during the transient response of the effective digital gain x _eff , the effective cumulative path gain x _eff · k/x may still experience a glitch 402B, but the integrated glitch energy in the relevant audio bandwidth (e.g., 24Khz) may be significantly smaller as compared to that of glitch 402A, and thus may result in reduction of perceptible audio artifacts to a listener. As shown in FIGURE 4C, in some embodiments, gain control circuit 20 may reduce glitch by controlling the change of selectable analog gain k/x so that it occurs over a duration of time (e.g., over a significant portion of the transient response of the effective digital gain x _eff )- In some of these embodiments, gain control circuit 20 may apply an inverse-step response filter to the selectable analog gain when switching from a first analog gain to a second analog gain over the duration of time, such that the selectable analog gain k/x transitions in steps from the first analog gain to the second analog gain. In applying the inverse-step response filter, gain control circuit 20 may apply an approximate inverse of the transient response of the effective digital gain x _eff to the selectable analog gain when switching between the first analog gain and the second analog gain. As a result of the approach depicted in FIGURE 4C, the effective cumulative path gain x _eff · k/x may still experience a glitch 402C, but such glitch 402C may be significantly smaller in magnitude as compared to that of glitch 402A, and thus may result in reduction of perceptible audio artifacts.

FIGURE 5 illustrates a block diagram of an example implementation of DAC block 14, in accordance with embodiments of the present disclosure. As shown in FIGURE 5, DAC block 14 may include a DAC 15, a capacitor 21 coupled between ground and a switch node, a switch 17 coupled between an output of DAC 15 and the switch node, and a switch 19 coupled between an input of DAC 15 and the switch node. When no change between gain modes is occurring, gain control circuit 20 may activate switch 19, coupling the input to the switch node. On the other hand, when a change between gain modes is occurring, gain control circuit 20 may activate switch 17, coupling the output to the switch node. The effect of activating switch 17 during changes between gain modes is to modify an analog response of at least one of a modulator internal to DAC 15 and/or DAC 15 itself for the duration of time in which switch 17 is activated.

For example, activation of switch 17 may bypass a low-pass filter of DAC 15 for the duration of time. Such reshaping of the analog response of the modulator internal to DAC 15 and/or DAC 15 itself may be to reduce latency between digital audio input signal DIG_IN and analog input signal Vnsr and/or decrease the transient duration of effective digital gain x _eff at analog input signal \½, thus reducing glitch.

FIGURE 6 is a block diagram of selected components of a gain control circuit for use within the audio integrated circuit depicted in FIGURE 2, and selected components of an audio integrated circuit which may be coupled to the gain control circuit, in accordance with embodiments of the present disclosure. The topology of FIGURE 6 is similar to that of FIGURE 3, except that DAC block 14 is replaced with a DAC block 14A, and gain element 12 has been placed within a modulator 31 of DAC block 14A.

FIGURE 7 is a block diagram of a modulator 31 for use within DAC block 14A, in accordance with embodiments of the present disclosure. As shown in FIGURE 7, DAC block 14 A may include a forward path comprising a loop filter 34 configured to generate a filtered signal responsive to digital audio input signal DIG_IN and a feedback signal (e.g., based on an error signal equal to the difference of the digital audio input signal and the feedback signal), a quantizer 36 responsive to the filtered signal and configured to generate a quantized signal, and gain element 12 (e.g., interfaced between loop filter 34 and quantizer 36) configured to apply a selectable digitally-controlled gain x to a signal within the forward path. DAC block 14A may also include a feedback path configured to generate the feedback signal responsive to the quantized signal, wherein the feedback path includes a gain element 38 having a gain 1/x inversely proportional to the selectable digitally-controlled gain of gain element 12. By moving gain element 12 inside modulator 31 of DAC block 14A (as opposed to before DAC block 14 as shown in FIGURE 3), the transient duration of the response of the selectable digitally-controlled gain x may be shorter, which may reduce a glitch on output signal VOUT as compared to the topology shown in FIGURE 3.

Although the various systems and methods described herein contemplate reduction of audio artifacts in audio paths personal audio devices, the systems and methods herein may also apply to any other audio systems, including, without limitation, home audio systems, theaters, automotive audio systems, live performances, etc.

This disclosure encompasses all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Similarly, where appropriate, the appended claims encompass all changes, substitutions, variations, alterations, and modifications to the exemplary embodiments herein that a person having ordinary skill in the art would comprehend. Moreover, reference in the appended claims to an apparatus or system or a component of an apparatus or system being adapted to, arranged to, capable of, configured to, enabled to, operable to, or operative to perform a particular function encompasses that apparatus, system, or component, whether or not it or that particular function is activated, turned on, or unlocked, as long as that apparatus, system, or component is so adapted, arranged, capable, configured, enabled, operable, or operative.

All examples and conditional language recited herein are intended for pedagogical objects to aid the reader in understanding the invention and the concepts contributed by the inventor to furthering the art, and are construed as being without limitation to such specifically recited examples and conditions. Although embodiments of the present inventions have been described in detail, it should be understood that various changes, substitutions, and alterations could be made hereto without departing from the spirit and scope of the disclosure.