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Patent Searching and Data


Title:
SYSTEMS AND METHODS FOR ZERO-DELAY WAKEUP FOR POWER GATED ASYNCHRONOUS PIPELINES
Document Type and Number:
WIPO Patent Application WO/2011/137339
Kind Code:
A3
Abstract:
A device including a pipeline having a number of groups of pipeline stages. Each group has at least one pipeline stage, a gated power supply power net or a gated ground power net, the gated power supply power net and the gated ground power net having components that allow gating power supply and ground to that group of pipeline stages. The device also has a number of control components, each control component controlling the gating of power supply or ground. Each group of pipeline stages controls the gating of power supply and ground of a subsequent group of pipeline stages. Each one group of pipeline stages being selected such that a forward propagation delay from a preceding group of pipeline stages to that one group is at least equal to a time required for activating gated power supply or ground in that one group. Methods of implementation are also discussed.

Inventors:
MANOHAR RAJIT (US)
OTERO CARLOS (US)
TSE JONATHAN (US)
Application Number:
PCT/US2011/034549
Publication Date:
February 09, 2012
Filing Date:
April 29, 2011
Export Citation:
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Assignee:
UNIV CORNELL (US)
MANOHAR RAJIT (US)
OTERO CARLOS (US)
TSE JONATHAN (US)
International Classes:
G06F1/32; H03K19/003
Foreign References:
US20060059376A12006-03-16
US20090172452A12009-07-02
US20050251699A12005-11-10
US20090217068A12009-08-27
Attorney, Agent or Firm:
COHEN, Jerry et al. (LLP125 Summer Stree, Boston MA, US)
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