Title:
TECHNIQUES FOR ATOMIC LAYER DEPOSITION
Document Type and Number:
WIPO Patent Application WO/2010/048161
Kind Code:
A3
Abstract:
Techniques for atomic layer deposition (ALD) are disclosed, in one particular exemplary embodiment, the techniques may be realized as a system for ALD comprising a plurality of reactors in a stacked configuration, wherein each reactor comprises a wafer holding portion for holding a target wafer, a gas assembly coupled to the plurality of reactors and configured to provide at least one gas to at least one of the plurality of reactors, and an exhaust assembly coupled to the plurality of reactors and configured to exhaust the at least one gas from the at least one of the plurality of reactors. The gas assembly may further comprise a valve assembly coupled to each of the first gas inlet, the second gas inlet, and the third gas inlet, where the valve assembly is configured to selectively release at least one of the first gas, the second gas, and the third gas.
Inventors:
MURAKAWA SHIGEMI (JP)
SINGH VIKRAM (US)
PAPASOULIOTIS GEORGE D (US)
OLSON JOSEPH C (US)
MURPHY PAUL J (US)
DICKERSON GARY E (US)
SINGH VIKRAM (US)
PAPASOULIOTIS GEORGE D (US)
OLSON JOSEPH C (US)
MURPHY PAUL J (US)
DICKERSON GARY E (US)
Application Number:
PCT/US2009/061298
Publication Date:
August 12, 2010
Filing Date:
October 20, 2009
Export Citation:
Assignee:
VARIAN SEMICONDUCTOR EQUIPMENT (US)
MURAKAWA SHIGEMI (JP)
SINGH VIKRAM (US)
PAPASOULIOTIS GEORGE D (US)
OLSON JOSEPH C (US)
MURPHY PAUL J (US)
DICKERSON GARY E (US)
MURAKAWA SHIGEMI (JP)
SINGH VIKRAM (US)
PAPASOULIOTIS GEORGE D (US)
OLSON JOSEPH C (US)
MURPHY PAUL J (US)
DICKERSON GARY E (US)
International Classes:
H01L21/205
Foreign References:
| US6042652A | 2000-03-28 | |||
| KR100796096B1 | 2008-01-21 | |||
| JP2001358080A | 2001-12-26 |
Attorney, Agent or Firm:
CHOI, Changhoon (Inc.35 Dory Roa, Gloucester MA, US)
Download PDF: