TEST PATTERN MANUFACTURING DEVICE, FAULT DETECTION SYSTEM, TEST PATTERN MANUFACTURING METHOD, PROGRAM, AND RECORDING MEDIUM

WIPO Patent Application WO/2013/105564

A1

Provided are a test pattern manufacturing device, etc., with which, while effecting characteristic maintenance of an original test pattern, it is possible to manufacture a new test pattern. This test pattern manufacturing device, which manufactures a test pattern which is inputted into a test object circuit of a scan test, comprises logic value generation means for generating a new logic value by referring to the logic values of a supplied first bit, second bit, and third bit, and either maintaining or inverting the logic value of the second bit. The logic value of the first bit is either that which an initial test pattern which is a supplied test pattern has, or that which a new test pattern which the test pattern manufacturing device has manufactured on the basis of the initial test pattern has. The logic value of the second bit is that which the initial test pattern has. The logic value of the third bit is either that which the initial test pattern has, or that which the new test pattern has.

JP4394311	A test pattern creation device, a test pattern creation method, and a program for causing a computer to perform processing on the device.
JP2008268185	TEST CIRCUIT, PATTERN GENERATION SYSTEM, AND PATTERN GENERATION METHOD
JP4890059	Semiconductor integrated circuit

SATO YASUO (JP)
KAJIHARA SEIJI (JP)

PCT/JP2013/050150

July 18, 2013

January 09, 2013

Click for automatic bibliography generation  

KYUSHU INST TECHNOLOGY (JP)

G01R31/3183

JP2011089833A	2011-05-06
JP2002181905A	2002-06-26
JPH0341374A	1991-02-21

HADATE Koji (JP)
Hadachi Koji (JP)

View/Download PDF      PDF Help

Previous Patent: IMAGE FORMING DEVICE

Next Patent: ANTENNA ELEMENT AND ANTENNA MODULE