| US5266885A | 1993-11-30 | |||
| US4958122A | 1990-09-18 | |||
| US4092693A | 1978-05-30 |
| 1. | WHAT IS CLAIMED IS: A method, comprising: generating a current VτAT/R. |
| 2. | , where R. |
| 3. | is the resistance of a second resistor of a current source, and where VΠAT S a voltage having a magnitude which increases substantially proportionally to an increasing absolute temperature of said current source; flowing said current across a first resistor to generate a voltage, said first and second resistors being made of like material and being realized on the same integrated circuit; and supplying said voltage to the base of a thermal shutdown transistor. |
| 4. | 2 The method of Claim 1, wherein a terminal of said first resistor is directly connected to the base of said thermal shutdown transistor. |
| 5. | An integrated circuit, comprising: a current source having an output terminal, said current source supplying a current onto said output terminal which increases substantially proportionally to an increasing absolute temperature; a first resistor having a first terminal and a second terminal, said first terminal of said first resistor being coupled to said output terminal of said current source; and a thermal shutdown transistor having an c.ititter, a base, and a collector, said base being connected to said first terminal of said first resistor, said emitter being connected to said second terminal of said first resistor. |
| 6. | The integrated circuit of Claim 3, wherein said integrated circuit does not comprise a bandgap voltage reference circuit. |
| 7. | The integrated circuit of Claim 4, wherein said integrated circuit has a first input terminal, a second input terminal and an output terminal, said integrated circuit further comprising: a power multiplexer coupled to said first and second input terminals and to said output terminal. |
| 8. | The integrated circuit of Claim 3, wherein said current source comprises a second resistor having a resistance R2, said current having a magnitude which proportional to VΓΓAT/R2, where Vp^ is a voltage which increases substantially proportionally with said absolute temperature. |
| 9. | The integrated circuit of Claim 6, wherein said first resistor and said second resistor are both formed in the same base diffusion processing step. |
| 10. | The integrated circuit of Claim 6, wherein said first resistor and said second resistor are both formed in the same resistor implant processing step. |
| 11. | The integrated circuit of Claim 6, wherein said first resistor and said second resistor are both formed in same well forming processing step. |
| 12. | The integrated circuit of Claim 3, wherein said current source comprises: a first transistor having a base, an emitter, and a collector; a second resistor having a first terminal and a second terminal, said first terminal being coupled to said emitter of said first transistor; a second transistor having a base, an emitter, and a collector, said first and second transistors being like transistors, said second transistor being smaller than said first transistor, said emitter of said second transistor being coupled to said second terminal of said second resistor; a control loop circuit which regulates a current flowing into said collector of said first transistor; and a current mirror comprising a first mirror transistor conducting said current flowing into said collector of said first transistor and a second mirror transir*.or which outputs said current onto said ou out terminal of said current source. |
| 13. | The integrated circuit of Claim 10, wherein said base of said first and second transistors of said current source are resistively coupled together. |
| 14. | The integrated circuit of Claim 10, wherein said base of said first and second transistors of said current source are directly connected together. |
| 15. | The integrated circuit of Claim 10, said first terminal of said second resistor being coupled to said emitter of said first transistor via a third transistor, said emitter of said second transistor being coupled to said second terminal of said second resistor via a fourth transistor, a base of said third transistor being connected to said emitter of said second transistor, a base of said fourth transistor being connected to said emitter of said first transistor. |
| 16. | The integrated circuit of Claim 3, further comprising: a hysteresis circuit which changes the resistance of said first resistor after said thermal shutdown transistor turns on in a thermal shutdown condition. |
| 17. | The integrated circuit of Claim 10, wherein said current source further comprises a start up circuit which causes a current to flow through at least one of said first and second transistors of said current source during a start up condition. |
| 18. | An integrated circuit, comprising: a thermal shutdown transistor having a base; and means for supplying a voltage onto said base of said thermal shutdown transistor, said voltage having a magnitude which changes substantially proportionally with increasing absolute temperature. |
| 19. | The integrated circuit of Claim 16, wherein said means for supplying a voltage comprises a current source and a first resistor, said current source comprising a second resistor, said first and second resistors being made of like material and being realized on the same integrated circuit. |
| 20. | The integrated circuit of Claim 17, wherein said integrated circuit is a power multiplexer integrated circuit which does not comprise a bandgap voltage reference circuit. |
FIELD OF THE INVENTION
This invention relates to thermal shutdown circuits. More particularly, this invention relates to integrated thermal shutdown circuits on integrated circuit chips which do not comprise bandgap voltage reference circuits.
BACKGROUND INFORMATION
Figure 1 (PRIOR ART) is an illustration of a conventional thermal shutdown circuit 1. A bandgap reference voltage circuit 2 generates a bandgap reference voltage V Bα which is substantially constant over a temperature range. The bandgap reference voltage V BO is therefore said to have a zero temperature coefficient over this range. The bandgap reference voltage V ∞ is divided using a voltage divider comprising resistors 3 and 4 to generate a voltage V^y,, which biases the base of a bipolar thermal shutdown transistor 5. The resistances of resistors 3 and 4 are chosen so that the voltage V^;,, biases the thermal shutdown transistor 5 to be substantially nonconductive over a desired operating temperature range of a circuit to be protected 6.
Because the base-to-emitter turn on voltage (V B ^^J) of a bipolar transistor decreases at approximately 2 mV/ β C, the voltage on the base of thenr.al shutdown transistor 5 requ red to turn transistor 5 on decreases with increasing temperature. When the temperature of the thermal shutdown circuit reaches an undesirably high temperature, the V BE(oo) of transistor 5 falls below the bias voltage Va G y,,. Accordingly, thermal shutdown transistor 5 turns on. Thermal shutdown transistor 5 turning on may, for example, shunt current away from the circuit to be protected 6, thereby preventing
circuit 6 from being damaged. The temperature at which thermal shutdown occurs can be chosen by appropriate choice of the resistances of resistors 3 and 4.
Figure 2 (PRIOR ART) is a graph illustrating the operation of the conventional thermal shutdown circuit of Figure 1. Line 7 is illustrative of an ideal zero temperature coefficient base bias voltage V H ^^, supplied to thermal shutdown transistor 5. Line 8 is illustrative of the V BE(on) of the thermal shutdown transistor 5. The thermal shutdown transistor 5 to a first approximation turns on at the temperature ("thermal temperature") where the two lines 7 and 8 intersect.
This conventional circuit has several problems. First, a bandgap reference voltage circuit must be realized. This may be somewhat involved and may result in a significant amount of silicon area being consumed. Second, the small angle between the lines 7 and 8 results in the thermal shutdown temperature being somewhat unrepeatable across a production spread. The thermal shutdown transistors of two seemingly identical integrated circuits may, for example, turn on at different temperatures due to process and geometry variations from die to die and/or wafer to wafer. Third, the bandgap reference voltage output by a real bandgap reference voltage circuit may not actually have a zero temperature coefficient at high temperatures. Line 9 is illustrative of a decrease in a bias voltage v Bθb i ι generated using a real bandgap reference voltage circuit at high temperatures. The smaller angle between the lines 8 and 9 results in an even less predictable thermal shutdown temperature. A thermal shutdown circuit is therefore desired which is more easily realized and/or has a more predictable thermal shutdown temperature.
SUMMARY
A bias voltage V^ A -n^ having a magnitude which increases proportionally with increasing absolute temperature is supplied to the base of bipolar shutdown transistor which has a V BE(00) which decreases with increasing absolute temperature. The angle between the bias voltage and the V BEon) of the shutdown transistor over temperature is therefore larger resulting in a more predictable thermal shutdown temperature. In some embodiments, the bias voltage for the shutdown transistor is generated by flowing the current from a current source over a first resistor of resistance Rl. The current output from the current source has a magnitude which increases proportionally with increasing absolute temperature. In some embodiments, the current source involves a scaled transistor pair and a second resistor, the current being output from the current source having a magnitude of V VTAT /R2 , where Vpι. AT is a voltage difference between the voltages on the emitters of the scaled transistor pair which increases proportionally with increasing absolute temperature, and where R2 is the resistance of the second resistor. In some embodiments, the first and second resistors are like resistors realized using the same processing steps on the same integrated circuit. A feedback control loop inside the current source maintains proper current source operation. In some embodiments, a startup circuit is provided in the feedback control loop. In some embodiments, a hysteresis circuit is provided to reduce the thermal shutdown temperature ("trip 1* temperature) once the thermal shutdown has occurred. Multiple current sources for generating currents having magnitudes which increase proportionally with increasing absolute temperature are disclosed.
BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 (PRIOR ART) is a simplified diagram of a conventional thermal shutdown circuit coupled to a circuit to be protected. Figure 2 (PRIOR ART) is a graph illustrating the operation of the conventional thermal shutdown circuit of Figure 1.
Figure 3 is a simplified circuit diagram in accordance with an embodiment of the present invention. Figure 4 is a graph illustrating an operation of the circuit of Figure 3.
Figure 5 is a simplified circuit diagram of one possible current source in accordance with an embodiment of the present invention. Figure 6 is a simplified circuit diagram of another possible current source in accordance with an embodiment of the present invention.
Figure 7 is a detailed circuit diagram in accordance with a specific embodiment of the present invention.
Figure 8 is a detailed circuit diagram in accordance with another specific embodiment of the present invention.
Figure 9 is a detailed circuit diagram in accordance with yet another specific embodiment of the present invention. The reference numerals in each of Figures 7-9 uniquely designate structure in that particular figure.
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Figure 3 is a simplified circuit diagram in accordance with an embodiment of the present invention.
To simplify the explanation it is assumed that the resistances of all resistors are constant with temperature. In the actual embodiment, circuit operation depends on the ratio of resistors so that the
effects of their temperature coefficients are effectively canceled.
A thermal shutdown circuit 10 and a circuit to be protected 11 are realized on the same integrated circuit chip. A bias voltage Vp TA - rt , having a magnitude which increases with increasing absolute temperature is generated by a current source 12 and a resistor 13. The magnitude of the current output by the current source 12 increases with increasing absolute temperature. The current from current source 12 is made to flow through resistor 13 of resistance Rl in order to generate the bias voltage Vjτ A τ bJs which biases the base of a bipolar shutdown transistor 14.
Figure 4 is a graph illustrating an operation of the circuit of Figure 3. Line 15 illustrates bias voltage V^ A i- b s increasing with increasing absolute temperature. Line 16 illustrates the base-to-emitter turn on voltage V BE(00) of shutdown transistor 14 decreasing with increasing absolute temperature. Because the bias voltage Vp TA -π,*,, in Figure 4 increases with temperature as opposed to being substantially constant as bias voltage V BObU , in the circuit of Figure 1, the angle between the bias voltage and the base-to- emitter turn on voltage is greater resulting in a more predictable thermal shutdown temperature.
Figure 5 is simplified circuit diagram of one possible realization of current source 12 in accordance with an embodiment of the present invention. PNP bipolar transistors 17-20 form a first current mirror. NPN bipolar transistors 21 and 22 form a second current mirror. The 4X and IX denote that transistors 22 and
21 are scaled such that the „...itter area of transistor
22 is four times as large as the emitter area of transistor 21. A resistor 23 of resistance R2 is connected between the emitter of transistor 22 and ground. Because the bases of transistors 21 and 22 are
connected together, the voltage across resistor 23 is equal to the V BE(on) of transistor 21 minus the V BE(01J) of transistor 22. Because transistors 21 and 22 are like transistors which are scaled to each other, the voltage dropped across resistor 23 increases with increasing temperature. Accordingly, the current I, increases with increasing temperature. If the collector current of transistor 22 I 2 is equal to the emitter current I j and if transistors 19 and 20 are a current mirror, then the current I 3 will also increase with increasing temperature. In Figure 5, the voltage difference between the V BEixt) of IX transistor 21 and the V BE(σ0j of 4X transistor 22 is denoted "Vp TA -r" to indicate that the difference is substantially proportional to absolute temperature.
A control loop is provided to maintain the currents I t and I 2 substantially equal to each other. If, for example, current I 2 is greater than current Ii, then some of current I 2 will flow into the base of transistor 21. The collector current of transistor 21 therefore increases and the voltage on the collector of transistor 21 decreases. Because the collector of transistor 21 is coupled to the base of a transistor 24, the base voltage of transistor 24 is decreased thereby reducing the amount of collector current I 4 flowing into the collector of transistor 24. The reduction in current I 4 is mirrored by the current mirror comprising transistors 17-20 to reduce current I 2 , thereby reducing the magnitude of current I 2 to be equal to the magnitude of current I j . If, on the other hand, the current I 2 is smaller than current Ij, then less current flows into the base of transistor 21 due to some of that current being conducted to ground through resistor 23. Accordingly, the voltage on the collector of transistor 21 increases, thereby raising the voltage on the base of transistor 24, thereby
increasing the collector current I 4 . The current mirror 17-20 then mirrors the increase in current I 4 to current I 2 , thereby increasing the magnitude of current I 2 to be equal to the magnitude of current Ij. A start up current source 25 is provided to pull current from node 26 during a startup condition of the current source. Once the feedback loop is properly regulating current I 2 , the startup current source 25 is disabled and does not conduct current from node 26. A loop compensation capacitor 27 is provided to establish a dominant pole in the Bode plot of the control loop.
Figure 6 is a simplified diagram of another possible realization of current source 12 of Figure 3. Like reference numerals indicate like circuit components. Resistor 27 is optional. The loop compensation capacitor 27 is located differently in the embodirants of Figures 5 and 6. Using the circuits of Figures 5 and 6, the bias voltage V PTATbi „ is equal to product of the current output from current source 12 and the resistance Rl of resistor 13. ^- AT -,*,, therefore is proportional to (V PTAT /R2 ) R1. In accordance with some embodiments of the present invention, resistors 23 and 13 are made of like material and are made in the same processing steps at the same time on the same die so that the temperature-to-resistance characteristics of the two resistors are similar and cancel each other in the (V FTAT /R2)R1 equation. For example, resistors 23 and 13 may both be made of base diffusion material made in the same processing steps, may both be made of implanted resistor material made in the same processing steps, and may both be made of P-well material made in the same processing steps.
Figure 7 is a detailed circuit diagram showing a thermal shutdown circuit employed in a voltage regulator integrated circuit in accordance with an embodiment of the present invention. Transistors Ql,
Q2 and Jl form a startup current source. Transistors Q3 and Q4 are scaled current mirror transistors, transistor Q3 having an emitter area which is ten times as great as the emitter area of transistor Q4. Transistors Q5A-Q5C form a current mirror corresponding with the current mirror of transistors 17-20 of Figure 5. Voltage V PJAT is developed across resistor Rl. Transistor Q6 is a thermal shutdown transistor and resistor R3 is a resistor corresponding with resistor 13 in Figure 3. The current source is regulated by a feedback loop extending from the collector of transistor Q3, through transistors Q5A and Q5B and back to the collector and base of transistor Q4. This feedback loop is small and therefore requires no additional capacitor for compensation.
Figure 8 is a detailed circuit diagram showing a thermal shutdown circuit employed in a voltage regulator integrated circuit in accordance with an embodiment of the present invention. Transistors Q4 and Q7 are scaled transistors which form a current mirror and correspond with transistors 21 and 22 of Figure 5. Transistors Q8A and Q8C form a current mirror which corresponds to the current mirror of transistors 17-20 in Figure 5. Voltage V JTAT is developed across resistor R2. Resistor R205 corresponds with resistor 13 of Figure 3. Transistor Q202 is a thermal shutdown transistor.
Figure 9 is a detailed circuit diagram showing a thermal shutdown circuit employed in a power multiplexer integrated circuit in accordance with an embodiment of the present invention. Transistors Ql and Q4 are scaled transistors which form a current mirror and correspond with transistors 21 and 22 of Figure 5. Transistors Q5A and Q5C form a current mirror which corresponds to the current mirror of transistors 17-20 in Figure 5. Voltage Vp^ is
developed across resistor Rl . Resistors R2 and R3 correspond with resistor 13 of Figure 3. Transistor Q6 is a thermal shutdown transistor. Transistors Ml and M2 operate in conjunction with transistor M3 to form a startup current source. Transistor M14 is a hysteresis switch which turns off once thermal shutdown transistor Q6 is turned on. Transistor M14 turning off increases the resistance through which the biasing current proportional to absolute temperature passes. The bias voltage on the base of transistor Q6 is therefore increased once thermal shutdown occurs so that the V BE(αι) required to turn shutdown transistor Q6 off is greater. As a result, a lower temperature is required to turn the thermal shutdown transistor off and resume normal circuit operation that is required to turn it on at the beginning of a thermal shutdown condition. Line 15A in Figure 4 illustrates the shifting upward of the V^ A - ΓIM ., line to create an "initiate thermal shutdown temperature" at a relatively higher temperature and a "terminate thermal shutdown temperature" at a relatively lower temperature.
Although the present invention has been described in connection with certain exemplary embodiments, the present invention is not limited thereto. Numerous current source structures which generate currents which increase with temperature can be employed. Additionally, numerous voltage sources which generate voltages which increase with temperature can be employed. The present invention is not limited to current and/or voltage sources which generate currents and/or voltages which vary proportionally with absolute temperature. Non-linear current and/or voltage to temperature sources can be employed in accordance with the present invention. It is to be understood, therefore, that various changes, modifications, and adaptations of the above described embodiments may be
practiced without departing from the scope of the invention as set forth in the appended claims.