Title:
THIN FILM TRANSISTOR, DISPLAY DEVICE, AND MANUFACTURING METHOD FOR THIN FILM TRANSISTOR AND DISPLAY DEVICE
Document Type and Number:
WIPO Patent Application WO/2011/078169
Kind Code:
A1
Abstract:
Disclosed is a method for efficiently manufacturing a thin film transistor (TFT) in which the generation of an OFF current is reduced. The thin film transistor (100) is provided with: a gate electrode (12) which is formed on a substrate (10); an insulating layer (14) which is formed on the gate electrode (12); a microcrystalline amorphous silicon layer (18) and an amorphous silicon layer (16) which are formed on the insulating later (14); an impurity-containing semiconductor layer (20) which is formed on the amorphous silicon layer (16); and a source electrode (22A) and a drain electrode (22B) which are formed on the impurity-containing semiconductor layer (20). The microcrystalline amorphous silicon layer (18) and the impurity-containing semiconductor layer (20) are connected via the amorphous silicon layer (16) so as not to be in direct contact with each other.
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Inventors:
HARUMOTO YOSHIYUKI
HARA TAKESHI
OKABE TOHRU
YANEDA TAKESHI
AITA TETSUYA
INOUE TSUYOSHI
TAKEI MICHIKO
HARA TAKESHI
OKABE TOHRU
YANEDA TAKESHI
AITA TETSUYA
INOUE TSUYOSHI
TAKEI MICHIKO
Application Number:
PCT/JP2010/073009
Publication Date:
June 30, 2011
Filing Date:
December 21, 2010
Export Citation:
Assignee:
SHARP KK (JP)
HARUMOTO YOSHIYUKI
HARA TAKESHI
OKABE TOHRU
YANEDA TAKESHI
AITA TETSUYA
INOUE TSUYOSHI
TAKEI MICHIKO
HARUMOTO YOSHIYUKI
HARA TAKESHI
OKABE TOHRU
YANEDA TAKESHI
AITA TETSUYA
INOUE TSUYOSHI
TAKEI MICHIKO
International Classes:
H01L21/336; G02F1/1368; G09F9/30; H01L21/20; H01L29/786
Foreign References:
| JP2009290168A | 2009-12-10 | |||
| JP2003133328A | 2003-05-09 | |||
| JPH07176747A | 1995-07-14 |
Attorney, Agent or Firm:
OKUDA SEIJI (JP)
Seiji Okuda (JP)
Seiji Okuda (JP)
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