Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
THIN-FILM TRANSISTOR, MANUFACTURING METHOD, AND ARRAY SUBSTRATE
Document Type and Number:
WIPO Patent Application WO/2017/148176
Kind Code:
A1
Abstract:
The present disclosure provides a thin-film transistor having a plurality of carbon nanotubes in its active layer, its manufacturing method, and an array substrate. The manufacturing method as such comprises: forming an insulating layer to at least substantially cover a channel region of the active layer between a source electrode and a drain electrode of the thin-film transistor, wherein the insulating layer is configured to substantially insulate from an environment, and have substantially little influence on, the plurality of carbon nanotubes in the active layer.

Inventors:
LIANG XUELEI (CN)
HUI GUANBAO (CN)
XIA JIYE (CN)
ZHANG FANGZHEN (CN)
TIAN BOYUAN (CN)
YAN QIUPING (CN)
PENG LIANMAO (CN)
Application Number:
PCT/CN2016/104884
Publication Date:
September 08, 2017
Filing Date:
November 07, 2016
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
BOE TECHNOLOGY GROUP CO LTD (CN)
UNIV BEIJING (CN)
International Classes:
H01L27/12; H01L21/336; H01L29/786
Foreign References:
CN105679676A2016-06-15
CN105280717A2016-01-27
TW200824051A2008-06-01
JP2006049459A2006-02-16
US20150364706A12015-12-17
CN101710588A2010-05-19
Other References:
LIANG SHIBO ET AL.: "APPLIED PHYSICS LETTERS", vol. 105, 11 August 2014, A I P PUBLISHING LLC, article "High-performance carbon-nanotube-based complementary field-effect-transistors and integrated circuits with yttrium oxide", pages: 1 - 4
DING LI ET AL.: "Self-Aligned U-Gate Carbon Nanotube Field-Effect Transistor with Extremely Small Parasitic Capacitance and Drain-Induced Barrier Lowering", ACS NANO, vol. 5, no. 4, 11 March 2011 (2011-03-11), pages 2512 - 2519, XP055844572, DOI: 10.1021/nn102091h
See also references of EP 3424071A4
Attorney, Agent or Firm:
TEE&HOWE INTELLECTUAL PROPERTY ATTORNEYS (CN)
Download PDF: