Title:
THIN FILM TRANSISTOR AND MATRIX CIRCUIT
Document Type and Number:
WIPO Patent Application WO/2014/189125
Kind Code:
A1
Abstract:
This thin film transistor (10) is a bottom-gate thin film transistor that is provided with a gate electrode (30), a gate insulating film (40), a semiconductor layer (60), a source electrode (70) and a drain electrode (80). This thin film transistor (10) is also provided with electrode wiring lines (71, 81) that extend respectively from the source electrode (70) and the drain electrode (80), and an insulating resin part (50) that is provided on the gate insulating film (40) so as to intervene between the electrode wiring lines (71, 81) and the gate insulating film (40). The insulating resin part (50) is provided at least at a position where the outer peripheral portion of the gate electrode (30) and the electrode wiring lines (71, 81) overlap each other.
Inventors:
OGURA SHINGO (JP)
Application Number:
PCT/JP2014/063661
Publication Date:
November 27, 2014
Filing Date:
May 23, 2014
Export Citation:
Assignee:
FUJIKURA LTD (JP)
International Classes:
H01L21/336; H01L21/28; H01L29/786
Domestic Patent References:
| WO2013057766A1 | 2013-04-25 | |||
| WO2006101017A1 | 2006-09-28 |
Foreign References:
| JPH04261017A | 1992-09-17 |
Attorney, Agent or Firm:
TOKOSHIE PATENT FIRM (JP)
It can exceed and is a patent business corporation. (JP)
It can exceed and is a patent business corporation. (JP)
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